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1GB-DDR3L-AS4C128M8D3L Datasheet, PDF (2/88 Pages) Alliance Semiconductor Corporation – internal banks for concurrent operation | |||
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1Gb DDR3L â AS4C128M8D3L
Confidential
128M x 8 bit DDR3L Synchronous DRAM (SDRAM)
Advanced (Rev. 2.0, Aug. /2014)
Features
ï· JEDEC Standard Compliant
ï· Power supplies: VDD & VDDQ = +1.35V
ï· Backward compatible: VDD & VDDQ = 1.5V +/- 0.075V
ï· Operating temperature:
- Commercial (0 ~ 95°C)
- Industrial (-40 ~ 95°C)
ï· Supports JEDEC clock jitter specification
ï· Fully synchronous operation
ï· Fast clock rate: 800MHz
ï· Differential Clock, CK & CK#
ï· Bidirectional differential data strobe
- DQS & DQS#
ï· 8 internal banks for concurrent operation
ï· 8n-bit prefetch architecture
ï· Internal pipeline architecture
ï· Precharge & active power down
ï· Programmable Mode & Extended Mode registers
ï· Additive Latency (AL): 0, CL-1, CL-2
ï· Programmable Burst lengths: 4, 8
ï· Burst type: Sequential / Interleave
ï· Output Driver Impedance Control
ï· 8192 refresh cycles / 64ms
- Average refresh period
7.8μs @ -40â â¦TC⦠+85â
3.9μs @ +85â ï¼TC⦠+95â
ï· Write Leveling
ï· OCD Calibration
ï· Dynamic ODT (Rtt_Nom & Rtt_WR)
ï· RoHS compliant
ï· Auto Refresh and Self Refresh
ï· 78-ball 8 x 10.5 x 1.2mm FBGA package
- Pb and Halogen Free
Overview
The 1Gb Double-Data-Rate-3 (DDR3L) DRAMs is
double data rate architecture to achieve high-speed
operation. It is internally configured as an eight bank
DRAM.
The 1Gb chip is organized as 16Mbit x 8 I/Os x 8 bank
devices. These synchronous devices achieve high
speed double-data-rate transfer rates of up to 1600
Mb/sec/pin for general applications.
The chip is designed to comply with all key DDR3L
DRAM key features and all of the control and address
inputs are synchronized with a pair of externally
supplied differential clocks. Inputs are latched at the
cross point of differential clocks (CK rising and CK#
falling). All I/Os are synchronized with differential DQS
pair in a source synchronous fashion.
These devices operate with a single 1.35V -0.067V
/+0.1V power supply and are available in BGA
packages.
Table 1. Speed Grade Information
Speed Grade
Clock Frequency
DDR3L-1600
800 MHz
CAS Latency
11
tRCD (ns)
13.75
tRP (ns)
13.75
Table 2. Ordering Information
Product part No
Org
AS4C128M8D3L-12BCN 128M x 8
AS4C128M8D3L-12BIN
128M x 8
Temperature
Commercial (Extended)
0°C to 95°C
Industrial
-40°C to 95°C (Extended)
Package
78-ball FBGA
78-ball FBGA
Confidential
2
Rev. 2.0
Aug. /2014
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