AK4955 Datasheet, PDF (95/117 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP/ LDO & DSP

[AK4955]
Addr
30H
Register Name
Digital Filter Select 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
EQ5
EQ4
EQ3
EQ2
EQ1
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
EQ1: Equalizer 1 Coefficient Setting Enable
0: Disable (default)
1: Enable
When EQ1 bit = “1”, settings of E1A15-0, E1B15-0 and E1C15-0 bits are enabled. When EQ1 bit = “0”, the
audio data passes this block by 0dB gain.
EQ2: Equalizer 2 Coefficient Setting Enable
0: Disable (default)
1: Enable
When EQ2 bit = “1”, settings of E2A15-0, E2B15-0 and E2C15-0 bits are enabled. When EQ2 bit = “0”, the
audio data passes this block by 0dB gain.
EQ3: Equalizer 3 Coefficient Setting Enable
0: Disable (default)
1: Enable
When EQ3 bit = “1”, settings of E3A15-0, E3B15-0 and E3C15-0 bits are enabled. When EQ3 bit = “0”, the
audio data passes this block by 0dB gain.
EQ4: Equalizer 4 Coefficient Setting Enable
0: Disable (default)
1: Enable
When EQ4 bit = “1”, settings of E4A15-0, E4B15-0 and E4C15-0 bits are enabled. When EQ4 bit = “0”, the
audio data passes this block by 0dB gain.
EQ5: Equalizer 5 Coefficient Setting Enable
0: Disable (default)
1: Enable
When EQ5 bit = “1”, settings of E5A15-0, E5B15-0 and E5C15-0 bits are enabled. When EQ5 bit = “0”. the
audio data passes this block by 0dB gain.
Addr
31H
Register Name
Check Sum
R/W
Default
SUM7-0: Checksum Read
D7
SUM7
R
0
D6
SUM6
R
0
D5
SUM5
R
0
D4
SUM4
R
0
D3
SUM3
R
0
D2
SUM2
R
0
D1
SUM1
R
0
D0
SUM0
R
0
MS1343-E-00
- 95 -
2011/12