AK4955 Datasheet, PDF (38/117 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP/ LDO & DSP

[AK4955]
2. Interface
The input data channel of the DMDAT pin is set by DCLKP bit. When DCLKP bit = “1”, L channel data is input to the
decimation filter if DMCLK = “H”, and R channel data is input if DMCLK = “L”. When DCLKP bit = “0”, R channel data
is input to the decimation filter while DMCLK pin= “H”, and L channel data is input while DMCLK pin= “L”. The
DMCLK pin only supports 64fs. It outputs “L” when DCLKE bit = “0”, and outputs 64fs when DCLKE bit = “1”. In this
case, necessary clocks must be supplied to the AK4955 for ADC operation. The output data through “the Decimation and
Digital Filters” is 24bit full scale when the 1bit data density is 0%~100%.
DCLKP bit
DMCLK pin= “H”
DMCLK pin= “L”
0
Rch
Lch
(default)
1
Lch
Rch
Table 23. Data In/Output Timing with Digital MIC (DCLKP bit = “0”)
DMCLK(64fs)
DMDAT (Lch)
DMDAT (Rch)
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Figure 32. Data In/Output Timing with Digital MIC (DCLKP bit = “1”)
DMCLK(64fs)
DMDAT (Lch)
DMDAT (Rch)
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Figure 33. Data In/Output Timing with Digital MIC (DCLKP bit = “0”)
MS1343-E-00
- 38 -
2011/12