AK4955 Datasheet, PDF (88/117 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP/ LDO & DSP

[AK4955]
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
08H Digital MIC
0
0 PMDMR PMDML DCLKE
0
DCLKP DMIC
R/W
R
R
R/W
R/W
R/W
R
R/W
R/W
Default
0
0
0
0
0
0
0
0
DMIC: Digital Microphone Connection Select
0: Analog Microphone (default)
1: Digital Microphone
DCLKP: Data Latching Edge Select
0: Lch data is latched on the DMCLK rising edge (“↑”). (default)
1: Lch data is latched on the DMCLK falling edge (“↓”).
DCLKE: DMCLK pin Output Clock Control
0: “L” Output (default)
1: 64fs Output
PMDML/R: Input Signal Select with Digital Microphone (Table 20)
Default: “00”
ADC digital block is powered-down by PMDML = PMDMR bits = “0” when selecting a digital microphone input
(DMIC bit = “1”).
Addr
Register
Name
D7
D6
D5
D4
D3
D2
D1
09H Timer Select ADRST1 ADRST0
0
0
0
0
0
R/W
R/W
R/W
R
R
R
R
R
Default
0
0
0
0
0
0
0
DVTM: Digital Volume Soft Transition Time Setting (Table 42)
Default: “0” (1024/fs)
This transition time is for when DVL7-0 bits or DVR7-0bits are changed from 00H to FFH.
ADRST1-0: ADC Initial Cycle Setting (Table 16)
Default: “00” (1059/fs)
D0
DVTM
R/W
0
MS1343-E-00
- 88 -
2011/12