AK4955 Datasheet, PDF (31/117 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP/ LDO & DSP

[AK4955]
■ EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”)
The AK4955 becomes EXT Master Mode by setting PMPLL bit = “0” and M/S bit = “1”. Master clock can be input to the
internal ADC and DAC directly from the MCKI pin without the internal PLL circuit operation. The external clock
required to operate the AK4955 is MCKI (256fs, 512fs or 1024fs). The input frequency of MCKI is selected by FS1-0 bits
(Table 13).
Mode
FS3-2 bits
FS1 bit FS0 bit
MCKI Input
Frequency
Sampling Frequency
Range
0
x
0
0
256fs
7.35kHz ∼ 48kHz (default)
1
x
0
1
1024fs
7.35kHz ∼ 13kHz
2
x
1
0
512fs
7.35kHz ∼ 26kHz
3
x
1
1
512fs
7.35kHz ∼ 48kHz
Table 13. MCKI Frequency at EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”) (x: Don’t care)
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.
The out-of-band noise can be reduced by using higher frequency of the master clock. The S/N of the DAC output through
LOUT/ROUT pins is shown in Table 14.
MCKI
S/N
(fs=8kHz, 20kHzLPF + A-weighted)
Mode0; 256fs
Mode3; 512fs
80dB
Mode2; 512fs
92dB
Mode1; 1024fs
92dB
Table 14. Relationship between MCKI and S/N of LOUT/ROUT pins
AK4955
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
256fs, 512fs or 1024fs
DSP or μP
MCLK
32fs or 64fs
BCLK
1fs
LRCK
SDTI
SDTO
Figure 22. EXT Master Mode
BCKO bit BICK Output Frequency
0
32fs
(default)
1
64fs
Table 15. BICK Output Frequency at Master Mode
MS1343-E-00
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2011/12