AK4955 Datasheet, PDF (18/117 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/SPK/Cap-less VIDEO-AMP/ LDO & DSP

[AK4955]
Parameter
Symbol min
typ
max Unit
Digital Audio Interface Timing; C_L=100pF
DMCLK Output Timing
Period
Rising Time
Falling Time
Duty Cycle
tSCK
-
1/(64fs)
-
ns
tSRise
-
-
10
ns
tSFall
-
-
10
ns
dSCK
40
50
60
%
Audio Interface Timing
DMDAT Setup Time
DMDAT Hold Time
tDSDS
50
-
tDSDH
0
-
-
ns
-
ns
Power-down & Reset Timing
PDN Accept Pulse Width
(Note 37)
tAPD
180
-
-
ns
PDN Reject Pulse Width
PMADL or PMADR “↑” to SDTO valid
ADRST1-0 bits =“00”
ADRST1-0 bits =“01”
ADRST1-0 bits =“10”
ADRST1-0 bits =“11”
(Note 37)
(Note 38)
tRPD
-
-
50
ns
tPDV
-
1059
-
1/fs
tPDV
-
267
-
1/fs
tPDV
-
531
-
1/fs
tPDV
-
135
-
1/fs
Note 37. The AK4955 can be reset by the PDN pin = “L”. The PDN pin must held “L” for more than 180ns for a certain
reset. The AK4955 is not reset by the “L” pulse less than 50ns.
Note 38. This is the count of LRCK “↑” from the PMADL or PMADR bit = “1”.
MS1343-E-00
- 18 -
2011/12