AK4683_07 Datasheet, PDF (80/84 Pages) Asahi Kasei Microsystems – Asynchronous Multi-Channel Audio CODEC with DIR/T

[AK4683]
SYSTEM DESIGN
Figure 50 shows the system connection diagram. The evaluation board is available which demonstrates application
circuits, the optimum layout, power supply arrangements and measurement results.
5
Analog in
+ ^10u
0.1u
1 PVDD
2 RX0
3 I2C
4 RX1
5 RX2
6 RX3
7 INT
8 DZF
9 CDTO/TEST
10 LRCKB
11 BICKB
12 SDTOB
13 OLRCKA
14 ILRCKA
15 BICKA
16 SDTOA
AK4683
++
X’tal
CC
+
10u
0.1u
RISEL 48
ROPIN 47
LOPIN 46
LISEL 45
AVSS2 44 ^{0.1u 10u}
AVDD2 43
+
0.1u
VCOM 42
2.2u
+
ROUT2 41
LOUT2 40
MUTE
MUTE
ROUT2 39
MUTE
LOUT2 38
MUTE
MUTET 37
1u
HPL 36
6.8 47u
6.8 47u
HPR 35
0.1u 10u
HVSS 34
HVDD 33
+
Analog 5V
Analog out
Headphone
Analog 5V
Audio DSP1
3.3V to 5V
Digital
5V Digital
Micro
Controller
S/PDIF out
Digital Ground
Analog Ground
Figure 50. Typical Connection Diagram( I²C serial control mode)
Notes:
- “C” depends on the crystal.
- AVSS, DVSS, PVSS and HVSS must be connected to the same analog ground plane.
- Digital signals, especially clocks, should be kept away from the R pin in order to avoid an effect to the clock jitter
performance.
- In case of coaxial input, ground of RCA connector and terminator should be connected to PVSS of the AK4683
with low impedance on PC board.
MS0427-E-02
- 80 -
2007/04