AK4683_07 Datasheet, PDF (53/84 Pages) Asahi Kasei Microsystems – Asynchronous Multi-Channel Audio CODEC with DIR/T

[AK4683]
■ Error Handling
There are the following eight events that make INT pin “H”. INT pin show the status of following conditions.
1. UNLOCK: “1” when the PLL loses lock.
The AK4683 loses lock when the distance between two preambles is not correct or when those
preambles are not correct.
2. PAR:
“1” when parity error or biphase coding error is detected, and keeps “1” until this register is read.
Updated every sub-frame cycle. Reading this register resets itself.
3. AUTO:
“1” when Non-PCM bitstream is detected.
Updated every 4096 frames cycle.
4. DTSCD:
“1” when DTS-CD bitstream is detected.
Updated every DTS-CD sync cycle.
5. AUDION: “1” when the “AUDIO” bit in recovered channel status indicates “1”.
Updated every block cycle.
6. PEM:
“1” when “PEM” in recovered channel status indicates “1”.
Updated every block cycle.
7. QINT:
“1” when Q-subcode differ from old one, and keeps “1” until this register is read.
Updated every sync code cycle for Q-subcode. Reading this register resets itself.
8. CINT:
“1” when received C bits differ from old one, and keeps “1” until this register is read.
Updated every block cycle. Reading this register resets itself.
INT pin is fixed to “L” when the PLL is off (CM1,0= “01”). Once the INT pin goes to “H”, this pin holds “H” for
1024/fs cycles (this value can be changed by EFH0/1 bits) after those events are removed. INT pin can mask those eight
events individually. Once PAR, QINT and CINT bit goes to “1”, those registers are held to “1” until those registers are
read. While the AK4683 loses lock, registers regarding C-bit or U-bits are not initialized and keep previous value.
INT pin outputs the ORed signal among those eight events. However, each mask bits can mask each event. When each
bit masks those events, the event does not affect INT pin operation (those mask do not affect those registers (UNLOCK,
PAR, etc.) themselves. Once INT pin goes “H”, it maintains “H” for 1024/fs cycles (this value can be changed by
EFH0-1 bits) after the all events are removed. Once those PAR, QINT or CINT bit goes “1”, it holds “1” until reading
those registers. While the AK4683 loses lock, the channel status Q-subcode bits are not updated and hold the previous
data. At initial state, INT outputs the ORed signal between UNLOCK and PAR.
UNLOCK
1
0
0
0
0
0
0
0
PAR
x
1
0
0
0
0
0
0
AUTO
x
x
1
x
x
x
x
x
Event
DTSCD
x
x
x
1
x
x
x
x
AUDION
x
x
x
x
1
x
x
x
PEM
x
x
x
x
x
1
x
x
QINT
x
x
x
x
x
x
1
x
Table 59. Error Handling
CINT
x
x
x
x
x
x
x
1
Pin
SDTO*
V* TX*
“L”
“L” Output
Previous Data Output Output
Output
Output Output
Output
Output Output
Output
Output Output
Output
Output Output
Output
Output Output
Output
Output Output
Note: when selected.
MS0427-E-02
- 53 -
2007/04