AK4683_07 Datasheet, PDF (69/84 Pages) Asahi Kasei Microsystems – Asynchronous Multi-Channel Audio CODEC with DIR/T

[AK4683]
Addr
05H
Register Name
Clock Select 4
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
XTL1 XTL0 CKSDT CKSB2 CKSB1 CKSB0 MSB
0
0
0
0
0
1
0
0
MSB: Master/Slave control for input data of PORTB.
Refer Table 17.
CKSB2-0: Clock control for PORTB.
Refer Table 14.
CKSDT: Clock control for DIT.
Refer Table 57.
XTL1-0: X’tal Frequency control
00: 11.2896MHz (default)
01: 12.288MHz
10: 24.576MHz
11: (channel status)
Addr
06H
Register Name
Sampling Speed
Default
D7
D6
D5
D4 D3 D2
D1
D0
0
ACKSAI ACKSAO ACKSB 0 DFSAD DFSDA1 DFSDA0
0
0
0
0
0
0
0
0
DFSDA1-0: DAC sampling speed control
These settings are ignored in Auto Setting Mode. Refer Table 22.
DFSAD: ADC sampling speed control
This setting is ignored in Auto Setting Mode. Refer Table 21.
ACSKB: Auto Setting Mode of PORTB
0: Disable, Manual Setting Mode (default)
1: Enable, Auto Setting Mode
Master clock frequency is detected automatically at ACKSB bit “1”. In this case, the setting of
DFSAD, DFSDA1-0 bits of the block connecting this PORT is ignored. When this bit is “0”,
DFSAD, DFSDA1-0 bits set the sampling speed mode.
ACSKAO: Auto Setting Mode of PORTA Output
0: Disable, Manual Setting Mode (default)
1: Enable, Auto Setting Mode
Master clock frequency is detected automatically at ACKSAO bit “1”. In this case, the setting of
DFSAD, DFSDA1-0 bits of the block connecting this PORT is ignored. When this bit is “0”,
DFSAD, DFSDA1-0 bits set the sampling speed mode.
ACSKAI: Auto Setting Mode of PORTA Input
0: Disable, Manual Setting Mode (default)
1: Enable, Auto Setting Mode
Master clock frequency is detected automatically at ACKSAI bit “1”. In this case, the setting of
DFSAD, DFSDA1-0 bits of the block connecting this PORT is ignored. When this bit is “0”,
DFSAD, DFSDA1-0 bits set the sampling speed mode.
MS0427-E-02
- 69 -
2007/04