AK4683_07 Datasheet, PDF (29/84 Pages) Asahi Kasei Microsystems – Asynchronous Multi-Channel Audio CODEC with DIR/T

[AK4683]
■ ADC, DAC Control
There are two modes for controlling the sampling speed for ADC and DAC. One is the Manual Setting Mode using the
DFSAD1-0, DFSDA1-0 bits, and the other is Auto Setting Mode. When the block connects to both PORTA and
PORTB, the PORTA setting is used.
1. Manual Setting Mode (ACSKAD / ACSKDA bit = “0”: Default)
When the ADC and DAC are connected to each PORT placed in Manual Setting Mode, the sampling speed are selected
by DFSAD, DFSDA1-0 bits (Table 21, Table 22). The frequencies and the duties of the clocks (ILRCKA, OLRCKA,
LRCKB, BICKA, BICKB) may be unstable for the moment when changing the sampling speed mode.
DFSAD0
0
1
Sampling Speed (fs)
Normal Speed Mode
32kHz~48kHz
Double Speed Mode
64kHz~96kHz
(default)
Table 21.ADC sampling speed (Manual Setting Mode)
DFSDA1
0
0
1
1
DFSDA0
0
1
0
1
Sampling Speed (fs)
Normal Speed Mode
32kHz~48kHz
Double Speed Mode
64kHz~96kHz
Quad Speed Mode
120kHz~192kHz
Not Available
-
(default)
Table 22.DAC sampling speed (Manual Setting Mode)
LRCKA
(LRCKB)
fs
32.0kHz
44.1kHz
48.0kHz
MCLK (MHz)
BICKA (BICKB)
(MHz)
256fs
384fs
512fs
64fs
8.1920
12.2880
16.3840
2.0480
11.2896
16.9344
22.5792
2.8224
12.2880
18.4320
24.5760
3.0720
(Normal Speed Mode @Manual Setting Mode)
Table 23. System clock example
LRCKA
MCLK (MHz)
BICKA (BICKB)
(LRCKB)
(MHz)
fs
128fs
192fs
256fs
64fs
88.2kHz
11.2896
16.9344
22.5792
5.6448
96.0kHz
12.2880
18.4320
24.5760
6.1440
(Double Speed Mode @Manual Setting Mode)
(Note: ADC is not available for 128fs and 192fs at Double Speed Mode (DFSAD=“1”))
Table 24. System clock example
MS0427-E-02
- 29 -
2007/04