 English |
|
|
|
|
|
|
|
| Z8F1601 Datasheet, PDF (212/246 Pages) Zilog, Inc. – Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter | |||
| |||
| ◁ |
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
194
Table 126. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
DA dst
DEC dst
DECW dst
DI
DJNZ dst, RA
EI
HALT
INC dst
INCW dst
IRET
JP dst
JP cc, dst
JR dst
JR cc, dst
Flags Notation:
Symbolic Operation
Address Mode
Opcode(s)
Flags
Fetch Instr.
dst src (Hex) C Z S V D H Cycles Cycles
dst â DA(dst)
R
40
* * *X- - 2
2
IR
41
2
3
dst â dst - 1
R
30
-***- - 2
2
IR
31
2
3
dst â dst - 1
RR
80
-***- - 2
5
IRR
81
2
6
IRQCTL[7] â 0
8F
------ 1
2
dst â dst â 1
r
if dst â 0
PC â PC + X
0A-FA - - - - - - 2
3
IRQCTL[7] â 1
9F
------ 1
2
Halt Mode
7F
------ 1
2
dst â dst + 1
R
20
-***- - 2
2
IR
21
2
3
r
0E-FE
1
2
dst â dst + 1
RR
A0
-***- - 2
5
IRR
A1
2
6
FLAGS â @SP
SP â SP + 1
PC â @SP
SP â SP + 2
IRQCTL[7] â 1
BF
****** 1
5
PC â dst
DA
8D
------ 3
2
IRR
C4
2
3
if cc is true
PC â dst
DA
0D-FD - - - - - - 3
2
PC â PC + X
DA
8B
------ 2
2
if cc is true
DA
PC â PC + X
0B-FB - - - - - - 2
2
* = Value is a function of the result of the operation.
- = Unaffected
X = Undefined
0 = Reset to 0
1 = Set to 1
PS017610-0404
eZ8 CPU Instruction Set
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese