Z8F1601 Datasheet, PDF (182/246 Pages) Zilog, Inc. – Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter

Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
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OCD Watchpoint Address Register
The OCD Watchpoint Address register specifies the lower 8 bits of the Register File
address bus to match when generating Watchpoint Debug Breaks. The full 12-bit Register
File address is given by {WPTCTL3:0], WPTADDR[7:0]}.
Table 97. OCD Watchpoint Address (WPTADDR)
BITS
7
6
5
4
3
2
1
0
FIELD
WPTADDR[7:0]
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WPTADDR[7:0]—Watchpoint Register File Address
These bits specify the lower eight bits of the register address to match when generating a
Watchpoint Debug Break.
OCD Watchpoint Data Register
The OCD Watchpoint Data register specifies the data to match if Watchpoint data match is
enabled.
Table 98. OCD Watchpoint Data (WPTDATA)
BITS
7
6
5
4
3
2
1
0
FIELD
WPTDATA[7:0]
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WPTDATA[7:0]—Watchpoint Register File Data
These bits specify the Register File data to match when generating Watchpoint Debug
Breaks with the WPDM bit (WPTCTL[5]) is set to 1.
—————
PS017610-0404
On-Chip Debugger