Z8F1601 Datasheet, PDF (136/246 Pages) Zilog, Inc. – Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter

Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
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118
I²C Control Register Definitions
I²C Data Register
The I²C Data register holds the data that is to be loaded into the I²C Shift register during a
write to a slave. This register also holds data that is loaded from the I²C Shift register dur-
ing a read from a slave. The I²C Shift is not accessible in the Register File address space,
but is used only to buffer incoming and outgoing data.
Table 66. I²C Data Register (I2CDATA)
BITS
7
6
5
4
3
2
1
0
FIELD
DATA
RESET
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ADDR
F50H
I²C Status Register
The Read-only I²C Status register indicates the status of the I²C Controller.
Table 67. I²C Status Register (I2CSTAT)
BITS
FIELD
RESET
R/W
ADDR
7
TDRE
1
R
6
RDRF
0
R
5
ACK
0
R
4
3
10B
RD
0
0
R
R
F51H
2
1
0
TAS
DSS
NCKI
0
0
0
R
R
R
TDRE—Transmit Data Register Empty
When the I²C Controller is enabled, this bit is 1 when the I²C Data register is empty.
When active, this bit causes the I²C Controller to generate an interrupt, except when the
I²C Controller is shifting in data during the reception of a byte or when shifting an address
and the RD bit is set. This bit and the interrupt are cleared by writing to the I²CD register.
RDRF—Receive Data Register Full
This bit is set active high when the I²C Controller is enabled and the I²C Controller has
PS017609-0803
I2C Controller