Z8F1601 Datasheet, PDF (133/246 Pages) Zilog, Inc. – Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter

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7. The I²C Controller loads the I²C Shift register with the contents of the I²C Data
register.
8. After one bit of address is shifted out by the SDA signal, the Transmit interrupt is
asserted.
9. Software responds by writing the second byte of address into the contents of the I²C
Data register.
10. The I²C Controller shifts the rest of the first byte of address and write bit out by the
SDA signal.
11. The I²C slave sends an acknowledge by pulling the SDA signal low during the next
high period of SCL. The I²C Controller sets the ACK bit in the I²C Status register.
12. The I²C Controller loads the contents of the I²C Shift register with the contents of the
I²C Data register.
13. The I²C Controller shifts the data out by the SDA signal. After the first bit has been
sent, the Transmit interrupt is asserted.
14. Software responds by writing the data to be written out to the I²C Control register.
15. The I²C Controller shifts out the rest of the second byte of slave address by the SDA
signal.
16. The I²C slave sends an acknowledge by pulling the SDA signal low during the next
high period of SCL. The I²C Controller sets the ACK bit in the I²C Status register.
17. The I²C Controller shifts the data out by the SDA signal. After the first bit is sent, the
Transmit interrupt is asserted.
18. Software responds by asserting the STOP bit of the I²C Control register.
19. The I²C Controller completes transmission of the data on the SDA signal.
20. The I²C Controller sends the STOP condition to the I²C bus.
Reading a Transaction with a 7-Bit Address
Figure 81 illustrates the data transfer format for a receive operation on a 7-bit addressed
slave. The shaded regions indicate data transferred from the I²C Controller to slaves and
unshaded regions indicate data transferred from the slaves to the I²C Controller.
S
Slave Address
R=1 A
Data
A
Data
AP
Figure 81. Receive Data Transfer Format for a 7-Bit Addressed Slave
The data transfer format for a receive operation on a 7-bit addressed slave is as follows:
PS017609-0803
I2C Controller