Z8F1601 Datasheet, PDF (198/246 Pages) Zilog, Inc. – Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter

Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!^®
180
SPI Slave Mode Timing
Figure 97 and Table 111 provide timing information for the SPI slave mode pins. Timing
is shown with SCK rising edge used to source MISO output data, SCK falling edge used to
sample MOSI input data.
SCK
T1
MISO
(Output)
MOSI
(Input)
T4
SS
(Input)
Output Data
T2 T3
Input Data
Figure 97. SPI Slave Mode Timing
Table 111. SPI Slave Mode Timing
Parameter Abbreviation
T₁
SCK (transmit edge) to MISO output Valid Delay
T₂
MOSI input to SCK (receive edge) Setup Time
T₃
MOSI input to SCK (receive edge) Hold Time
T₄
SS input assertion to SCK setup
Delay (ns)
Minimum Maximum
2 * Xin 3 * Xin
period period + 20
nsec
0
3 * Xin
period
1 * Xin
period
PS017610-0404
Electrical Characteristics