DS579 Datasheet, PDF(6/23 Page) Xilinx, Inc – Supports unaligned address transfers

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

DS579 Datasheet, PDF (6/23 Pages) Xilinx, Inc – Supports unaligned address transfers

◁

LogiCORE IP XPS Central DMA Controller (v2.03a)

Table 1: I/O Signal Description (Contâd)

Port

Signal Name

Interface I/O

Initial

State

Description

P30 MPLB_MSSize[0:1]

PLB

I

-

PLB slave data bus size

P31 MPLB_MTimeout

PLB

I

-

PLB master bus time out

P32 MPLB_MIRQ

PLB

I

-

PLB master slave interrupt indicator

PLB Slave Interface Signals

P33 SPLB_Clk

PLB

I

-

PLB clock

P34 SPLB_Rst

PLB

I

-

PLB reset

P35

SPLB_ABus[0:C_SPLB_

AWIDTH - 1]

PLB

I

-

PLB address bus

P36 SPLB_type[0:2]

PLB

I

-

PLB transfer type

P37 SPLB_size[0:3]

PLB

I

-

PLB transfer size

P38 SPLB_abort

PLB

I

-

PLB abort bus request indicator

P39 SPLB_rdBurst

PLB

I

-

PLB burst read transfer indicator

P40 SPLB_wrBurst

PLB

I

-

PLB burst write transfer indicator

P41

SPLB_BE[0:C_SPLB_

DWIDTH/8 - 1]

PLB

I

-

PLB byte enables

P42

SPLB_wrDBus[0:C_SPLB_

DWIDTH - 1]

PLB

I

-

PLB write data bus

P43 SPLB_RNW

PLB

I

-

PLB read not write

P44 SPLB_PAValid

PLB

I

-

PLB primary address valid indicator

P45 SPLB_SAValid

PLB

I

-

PLB secondary address valid indicator

P46

SPLB_masterID[0:C_

SPLB_MIDWIDTH - 1]

PLB

I

-

PLB current master identifier

P47 SPLB_rdPrim

PLB

I

-

PLB secondary to primary read request

indicator

P48 SPLB_wrPrim

PLB

I

-

PLB secondary to primary write request

indicator

P49 SPLB_busLock

PLB

I

-

PLB lock

P50 SPLB_MSize[0:1]

PLB

I

-

PLB master data bus size

P51 SPLB_UABus[0:31]

PLB

I

-

PLB upper address bus

P52 SPLB_reqpri[0:1]

PLB

I

-

PLB current request priority

P53 SPLB_TAttribute[0:15]

PLB

I

-

PLB Transfer Attribute bus

P54 SPLB_lockerr

PLB

I

-

PLB lock error indicator

P55 SPLB_rdpendPri[0:1]

PLB

I

-

PLB pending read request priority

P56 SPLB_wrpendPri[0:1]

PLB

I

-

PLB pending write request priority

P57 SPLB_rdpendReq

PLB

I

-

PLB pending bus read request indicator

P58 SPLB_wrpendReq

PLB

I

-

PLB pending bus write request indicator

P59

Sl_rdDBus[0:C_SPLB_

DWIDTH - 1]

PLB

O

0

Slave read data bus

DS579 December 14, 2010

www.xilinx.com

6

Product Specification

▷