DS626 Datasheet, PDF (1/21 Pages) Xilinx, Inc – Parameterizable depth of channel buffers

DS626 April 24, 2009
Multi-Channel (MCH) PLBv46
Slave Burst (v1.00a)
Product Specification
Introduction
The Xilinx Multi-Channel (MCH) and PLBv46 Slave
Burst (MCH_PLBv46_Slave_Burst) provides a bi-direc-
tional interface between a parameterizable number of
channel interfaces and an PLBv46 Slave Burst interface
to an IP core.
The channel interfaces can be configured with a Xilinx
Cachelink (XCL) protocol to provide a direct cacheline
interface from processors to external memories.
Features
The MCH_PLBv46_Slave_Burst is a soft IP core
designed for Xilinx FPGAs and contains the following
features:
• Parameterizable inclusion of PLB slave interface
compatible with IBM CoreConnect PLBV4.6 buses
of 32, 64, 128-bits.
• Parameterizable number of channel interfaces.
♦ Each channel can be configured with a Xilinx
Cachelink (XCL) protocol. Each XCL channel
provides parameterizable:
- Cacheline size (1, 4, 8, or 16 words)
- Single, cacheline, or no write transactions
• Parameterizable depth of channel buffers.
• Fixed arbitration mode between channel interfaces
and PLB interface.
• Supports target-word first XCL cache-line
transactions of 1, 4, 8 and 16 words.
• Supports target-word first PLB Cacheline read and
line-word first PLB Cacheline write transactions of
4, 8 and 16 words.
• Supports low latency PLB Point-to-Point topology.
• Design optimized to minimize latency.
LogiCORE™ IP Facts
Core Specifics
Supported Device
Family
See EDK Supported Device
Families.
Version of Core
mch_plbv46_sla
ve_burst
v1.00a
Resources Used
Min
Max
Slices
LUTs
Refer to the Table 10
FFs
Block RAMs
N/A
Special Features
N/A
Provided with Core
Documentation
Product Specification
Design File Formats VHDL
Constraints File
N/A
Verification
N/A
Instantiation Template N/A
Reference Designs & N/A
Application notes
Additional Items
N/A
Design Tool Requirements
Xilinx Implementation
Tools
Verification
Simulation
See Tools for requirements.
Synthesis
Support
Provided by Xilinx, Inc.
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other countries. All other trademarks are the property of their respective owners.
DS626 April 24, 2009
www.xilinx.com
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Product Specification