W9751G8JB Datasheet, PDF (78/86 Pages) Winbond – 16M  4 BANKS  8 BIT DDR2 SDRAM

W9751G8JB
10.20 Burst read operation followed by precharge: RL=4 (AL=0, CL=4, BL=8, tRTP
> 2clks)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK/CLK
CMD
Post CAS
READ A
DQS,
DQS
AL = 0
DQ's
NOP
NOP
NOP
AL + BL/2 + max(RTP, 2) - 2 clks
NOP
Precharge
NOP
NOP
Bank A
Activate
CL = 4
RL = 4
≥ tRAS
≥ tRP
Dout Dout Dout Dout Dout Dout Dout Dout
A0 A1 A2 A3 A4 A5 A6 A7
≥ tRTP
first 4-bit prefetch
second 4-bit prefetch
10.21 Burst write operation followed by precharge: WL = (RL-1) = 3
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK/CLK
CMD
Post CAS
WRITE A
DQS,
DQS
DQ's
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Completion of the Burst Write
≥ tWR
WL = 3
DIN DIN DIN DIN
A0 A1 A2 A3
Precharge
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Publication Release Date: Oct. 12, 2010
Revision A01