W9751G8JB Datasheet, PDF (38/86 Pages) Winbond – 16M  4 BANKS  8 BIT DDR2 SDRAM

W9751G8JB
9.4 ODT DC Electrical Characteristics
(0°C ≤ TCASE ≤ 85°C for -18/-25/-3, -40°C ≤ TCASE ≤ 95°C for 25I, VDD, VDDQ = 1.8V ± 0.1V)
PARAMETER/CONDITION
Rtt effective impedance value for EMRS(A6,A2)=0,1; 75 Ω
Rtt effective impedance value for EMRS(A6,A2)=1,0; 150 Ω
Rtt effective impedance value for EMRS(A6,A2)=1,1; 50 Ω
Deviation of VM with respect to VDDQ/2
SYM.
Rtt1(eff)
Rtt2(eff)
Rtt3(eff)
ΔVM
MIN.
60
120
40
-6
NOM.
75
150
50
MAX.
90
180
60
+6
UNIT
Ω
Ω
Ω
%
NOTES
1
1
1, 2
1
Notes:
1. Test condition for Rtt measurements.
2. Optional for DDR2-667, mandatory for DDR2-800 and DDR2-1066.
Measurement Definition for Rtt(eff):
Apply VIH (ac) and VIL (ac) to test pin separately, then measure current I(VIH (ac)) and I(VIL (ac))
respectively. VIH (ac), VIL (ac), and VDDQ values defined in SSTL_18.
Rtt(eff) = (VIH(ac) – VIL(ac)) /(I(VIHac) – I(VILac))
Measurement Definition for ΔVM:
Measure voltage (VM) at test pin (midpoint) with no load.
ΔVM = ((2 x Vm / VDDQ) – 1) x 100%
9.5 Input DC Logic Level
(0°C ≤ TCASE ≤ 85°C for -18/-25/-3, -40°C ≤ TCASE ≤ 95°C for 25I, VDD, VDDQ = 1.8V ± 0.1V)
PARAMETER
SYM.
MIN.
MAX.
DC input logic HIGH VIH(dc)
VREF + 0.125
VDDQ + 0.3
DC input logic LOW VIL(dc)
-0.3
VREF - 0.125
UNIT
V
V
9.6 Input AC Logic Level
(0°C ≤ TCASE ≤ 85°C for -18/-25/-3, -40°C ≤ TCASE ≤ 95°C for 25I, VDD, VDDQ = 1.8V ± 0.1V)
PARAMETER
SYM.
-18
MIN.
MAX.
-25/25I/-3
MIN.
MAX.
AC input logic HIGH
AC input logic LOW
VIH (ac)
VIL (ac)
VREF + 0.200


VREF - 0.200
VREF + 0.200
VSSQ - VPEAK¹
VDDQ + VPEAK¹
VREF - 0.200
UNIT
V
V
Note:
1. Refer to the page 66 sections 9.14.1 and 9.14.2 AC Overshoot/Undershoot specification table for VPEAK value: maximum
peak amplitude allowed for Overshoot/Undershoot.
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Publication Release Date: Oct. 12, 2010
Revision A01