W9751G8JB Datasheet, PDF (40/86 Pages) Winbond – 16M  4 BANKS  8 BIT DDR2 SDRAM

W9751G8JB
9.9 DC Characteristics
(0°C ≤ TCASE ≤ 85°C for -18/-25/-3, -40°C ≤ TCASE ≤ 95°C for 25I, VDD, VDDQ = 1.8V ± 0.1V)
SYM.
IDD0
IDD1
IDD2P
IDD2N
IDD2Q
IDD3PF
IDD3PS
IDD3N
CONDITIONS
Operating Current - One Bank Active-Precharge
tCK = tCK(IDD), tRC = tRC(IDD), tRAS = tRASmin(IDD);
CKE is HIGH, CS is HIGH between valid commands;
Address and control inputs are SWITCHING;
Databus inputs are SWITCHING.
Operating Current - One Bank Active-Read-
Precharge
IOUT = 0 mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK(IDD), tRC = tRC(IDD), tRAS = tRASmin(IDD), tRCD
= tRCD(IDD);
CKE is HIGH, CS is HIGH between valid commands;
Address and control inputs are SWITCHING;
Data bus inputs are SWITCHING.
Precharge Power-Down Current
All banks idle;
tCK = tCK(IDD);
CKE is LOW;
Other control and address inputs are STABLE;
Data Bus inputs are FLOATING. (TCASE ≤ 85°C)
Precharge Standby Current
All banks idle;
tCK = tCK(IDD);
CKE is HIGH, CS is HIGH;
Other control and address inputs are SWITCHING;
Data bus inputs are SWITCHING.
Precharge Quiet Standby Current
All banks idle;
tCK = tCK(IDD);
CKE is HIGH, CS is HIGH;
Other control and address inputs are STABLE;
Data bus inputs are FLOATING.
Active Power-Down Current
All banks open;
tCK = tCK(IDD);
Fast PDN Exit
MRS(12) = 0
CKE is LOW;
Other control and address inputs are
STABLE;
Slow PDN Exit
Data bus inputs are FLOATING. ^{MRS(12) = 1}
(TCASE ≤ 85°C)
Active Standby Current
All banks open;
tCK = tCK(IDD); tRAS = tRASmax(IDD), tRP = tRP(IDD);
CKE is HIGH, CS is HIGH between valid commands;
Other control and address inputs are SWITCHING;
Data bus inputs are SWITCHING.
-18 -25/25I -3
MAX. MAX. MAX.
65
55
55
70
62
60
6
6
6
40
35
35
35
30
30
10
10
10
10
10
10
55
45
45
UNIT
mA
mA
mA
mA
mA
mA
mA
mA
NOTES
1,2,3,4,5,
6
1,2,3,4,5,
6
1,2,3,4,5,
6,7
1,2,3,4,5,
6
1,2,3,4,5,
6
1,2,3,4,5,
6
1,2,3,4,5,
6,7
1,2,3,4,5,
6
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Publication Release Date: Oct. 12, 2010
Revision A01