W9751G8JB Datasheet, PDF (15/86 Pages) Winbond – 16M  4 BANKS  8 BIT DDR2 SDRAM

W9751G8JB
7.2.3 Off-Chip Driver (OCD) Impedance Adjustment
DDR2 SDRAM supports driver calibration feature and the flow chart in Figure 6 is an example of the
sequence. Every calibration mode command should be followed by “OCD calibration mode exit”
before any other command being issued. MRS should be set before entering OCD impedance
adjustment and On Die Termination (ODT) should be carefully controlled depending on system
environment.
Start
All MR shoud be programmed before entering OCD impedance adjustment and ODT should
be carefully controlled depending on system environment
EMRS: OCD calibration mode exit
EMRS: Drive(1)
DQ &DQS High; DQS Low
EMRS: Drive(0)
DQ &DQS Low; DQS High
ALL OK
Test
Need Calibration
EMRS: OCD calibration mode exit
ALL OK
Test
Need Calibration
EMRS: OCD calibration mode exit
EMRS:
Enter Adjust Mode
EMRS:
Enter Adjust Mode
BL=4 code input to all DQs
Inc, Dec or NOP
BL=4 code input to all DQs
Inc, Dec or NOP
EMRS: OCD calibration mode exit
EMRS: OCD calibration mode exit
EMRS: OCD calibration mode exit
End
Figure 6 – OCD Impedance Adjustment Flow Chart
- 15 -
Publication Release Date: Oct. 12, 2010
Revision A01