W9751G8JB Datasheet, PDF (72/86 Pages) Winbond – 16M  4 BANKS  8 BIT DDR2 SDRAM

W9751G8JB
10.9 Data input (write) timing
DQS
DQS
DQ
DM
DQS
tDQSH
tDQSL
DQS
tWPRE
VIH(ac)
D
VIL(ac)
tDS
DMin
D
tDS
VIH(ac)
DMin
VIL(ac)
VIH(dc)
D
VIL(dc)
tDH
DMin
tWPST
D
tDH
VIH(dc)
DMin
VIL(dc)
10.10 Burst write operation: RL=5 (AL=2, CL=3, WL=4, BL=4)
T0
T1
T2
CLK
CLK
CMD
Posted CAS
WRITE A
NOP
Case 1: with tDQSS(max)
NOP
DQS
DQS
WL = RL – 1= 4
DQs
Case 2: with tDQSS(min)
DQS
DQS
DQs
WL = RL – 1= 4
T3
T4
T5
T6
T7
Tn
NOP
NOP
tDQSS
NOP
tDQSS
tDSS
NOP
NOP
tDSS
Completion of
The Burst Write
Precharge
DIN DIN DIN DIN
A0
A1
A2
A3
tDQSS
tDQSS
tDSH
tDSH
≥ tWR
DIN DIN DIN DIN
A0
A1
A2
A3
≥ tWR
- 72 -
Publication Release Date: Oct. 12, 2010
Revision A01