W9751G8JB Datasheet, PDF (45/86 Pages) Winbond – 16M  4 BANKS  8 BIT DDR2 SDRAM

W9751G8JB
9.11.2 AC Characteristics and Operating Condition for -25/25I/-3 speed grades
SPEED GRADE
SYM.
Bin(CL-tRCD-tRP)
PARAMETER
tRCD Active to Read/Write Command Delay Time
tRP Precharge to Active Command Period
tRC
tRAS
tRFC
tREFI
Active to Ref/Active Command Period
Active to Precharge Command Period
Auto Refresh to Active/Auto Refresh command
period
Average periodic
refresh Interval
0°C ≤ TCASE ≤ 85°C
85°C < TCASE ≤ 95°C
tCCD _{CAS to CAS command delay}
tCK(avg)
tCH(avg)
tCL(avg)
tCK(avg) @ CL=3
Average clock period
tCK(avg) @ CL=4
tCK(avg) @ CL=5
tCK(avg) @ CL=6
Average clock high pulse width
Average clock low pulse width
tAC _{DQ output access time from CLK/ CLK}
DDR2-800
(-25/25I)
5-5-5/6-6-6
MIN.
MAX.
12.5

12.5

52.5

40
70000
105


7.8

3.9
2

5
8
3.75
8
2.5
8
2.5
8
0.48
0.52
0.48
0.52
-400
400
DDR2-667
(-3)
5-5-5
MIN. MAX.
15

15

55

40
70000
105


7.8

3.9
2

5
8
3.75
8
3
8


0.48
0.52
0.48
0.52
-450
450
tDQSCK _{DQS output access time from CLK / CLK}
-350
350
-400
400
tDQSQ DQS-DQ skew for DQS & associated DQ signals

200

240
tCKE CKE minimum high and low pulse width
3

3

tRRD
Active to active command period for 1KB page
size
7.5

7.5

tFAW Four Activate Window for 1KB page size
35

37.5

tWR Write recovery time
15

15

tDAL Auto-precharge write recovery + precharge time WR + tnRP  WR + tnRP 
tWTR Internal Write to Read command delay
7.5

7.5

tRTP Internal Read to Precharge command delay
7.5

7.5

tIS (base) Address and control input setup time
175

200

tIH (base) Address and control input hold time
250

275

tIS (ref) Address and control input setup time
375

400

tIH (ref) Address and control input hold time
375

400

tIPW
Address and control input pulse width for each
input
0.6

0.6

tDQSS
DQS latching rising transitions to associated
clock edges
-0.25
0.25
-0.25
0.25
tDSS DQS falling edge to CLK setup time
0.2

0.2

tDSH DQS falling edge hold time from CLK
0.2

0.2

tDQSH DQS input high pulse width
0.35

0.35

tDQSL DQS input low pulse width
0.35

0.35

UNITS²⁵ NOTES
nS
23
nS
23
nS
23
nS
4,23
nS
5
μS
μS
nCK
nS
nS
nS
nS
tCK(avg)
tCK(avg)
pS
5
5,6
30,31
30,31
30,31
30,31
30,31
30,31
35
pS
35
pS
13
nCK
7
nS
8,23
nS
23
nS
23
nCK
24
nS
9,23
nS
4,23
pS
10, 26,
40,42,43
pS
11, 26,
40,42,43
pS
10,26,
40,42,43
pS
11,26,
40,42,43
tCK(avg)
tCK(avg) 28
tCK(avg) 28
tCK(avg) 28
tCK(avg)
tCK(avg)
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Publication Release Date: Oct. 12, 2010
Revision A01