W25Q256FVBIF-TR Datasheet, PDF (57/108 Pages) Winbond – 3V 256M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI

W25Q256FV
/CS
CLK
Mode 3
Mode 0
IO₀
01
6 7 8 9 10 11 12 13 14 15 16 17
32-Bit Address
M7-0 Dummy Dummy
IOs switch from
Input to Output
28 24
4040
40404
IO₁
29 25
5151
51515
IO₂
30 26
6262
62626
IO₃
31 27
7373
73
Byte 1
73
Byte 2
7
Byte 3
Figure 25b. Fast Read Quad I/O with 4-Byte Address Instruction (Previous instruction set M5-4 = 10, SPI Mode only)
Fast Read Quad I/O with “8/16/32/64-Byte Wrap Around” in Standard SPI mode
The Fast Read Quad I/O instruction can also be used to access a specific portion within a page by
issuing a “Set Burst with Wrap” (77h) command prior to ECh. The “Set Burst with Wrap” (77h) command
can either enable or disable the “Wrap Around” feature for the following ECh commands. When “Wrap
Around” is enabled, the data being accessed can be limited to either an 8, 16, 32 or 64-byte section of a
256-byte page. The output data starts at the initial address specified in the instruction, once it reaches the
ending boundary of the 8/16/32/64-byte section, the output will wrap around to the beginning boundary
automatically until /CS is pulled high to terminate the command.
The Burst with Wrap feature allows applications that use cache to quickly fetch a critical address and then
fill the cache afterwards within a fixed length (8/16/32/64-byte) of data without issuing multiple read
commands.
The “Set Burst with Wrap” instruction allows three “Wrap Bits”, W6-4 to be set. The W4 bit is used to
enable or disable the “Wrap Around” operation while W6-5 are used to specify the length of the wrap
around section within a page. Refer to section 8.2.24 for detail descriptions.
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Publication Release Date: February 11, 2015
Preliminary – Revision H