W25Q256FVBIF-TR Datasheet, PDF (19/108 Pages) Winbond – 3V 256M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI

W25Q256FV
/HOLD or /RESET Function
(Volatile/Non-Volatile Writable)
Output Driver Strength
(Volatile/Non-Volatile Writable)
Reserved
Write Protect Selection
(Volatile/Non-Volatile Writable)
Power Up Address Mode
(Non-Volatile Writable)
Current Address Mode
(Status-Only)
S23 S22 S21 S20
HOLD
/RST
DRV1
DRV0
(R)
S19 S18 S17 S16
(R) WPS ADP ADS
Figure 4c. Status Register-3
7.1.10 Current Address Mode (ADS) – Status Only
The Current Address Mode bit is a read only bit in the Status Register-3 that indicates which address
mode the device is currently operating in. When ADS=0, the device is in the 3-Byte Address Mode, when
ADS=1, the device is in the 4-Byte Address Mode.
7.1.11 Power-Up Address Mode (ADP) – Non-Volatile Writable
The ADP bit is a non-volatile bit that determines the initial address mode when the device is powered on
or reset. This bit is only used during the power on or device reset initialization period, and it is only
writable by the non-volatile Write Status sequence (06h + 11h). When ADP=0 (factory default), the device
will power up into 3-Byte Address Mode, the Extended Address Register must be used to access memory
regions beyond 128Mb. When ADP=1, the device will power up into 4-Byte Address Mode directly.
7.1.12 Write Protect Selection (WPS) – Volatile/Non-Volatile Writable
The WPS bit is used to select which Write Protect scheme should be used. When WPS=0, the device will
use the combination of CMP, TB, BP[3:0] bits to protect a specific area of the memory array. When
WPS=1, the device will utilize the Individual Block Locks to protect any individual sector or blocks. The
default value for all Individual Block Lock bits is 1 upon device power on or after reset.
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Publication Release Date: February 11, 2015
Preliminary – Revision H