W83627THF_06 Datasheet, PDF (103/142 Pages) Winbond – Winbond LPC I/O

W83627THF/W83627THG
CRE4 (Default 0x00)
Bit 7 : Power loss control bit 2.
= 0 Disable ACPI resume
= 1 Enable ACPI resume
Bit 6-5 : Power loss control bit <1:0>
= 00 System always turn off when come back from power loss state.
= 01 System always turn on when come back from power loss state.
= 10 System turn on/off when come back from power loss state depend on the state
before power loss.
= 11 Reserved.
Bit 4 : Reserved
Bit 3 : Keyboard wake-up type select for wake-up the system from S1/S2.
= 0 LA.CRE0.bit0 determines how system wake up from S1/S2.
= 1 Any key.
Bit 2
: Enable all wake-up event set in CRE0 can wake-up the system from S1/S2 state. This
bit is cleared when wake-up event occurs.
= 0 Disable.
= 1 Enable.
Bit 1 - 0 : Reserved. Must be 00b.
CRE5 (Default 0x00)
Bit 7 : Reserved.
Bit 6 - 0 : Compared Code Length. When the compared codes are storied in the data register,
these data length should be written to this register.
CRE6 (Default 0x00)
Bit 7
ENMDAT_UP. This bit combining with MSRKEY (bit 4 of CRE0 of logical device A) and
MSXKEY (bit 1 of CRE0 of logical device A) define what kind of mouse wake-up event
can trigger an active low pulse on PSOUT#. Their combination is described in the
following table.
ENMDAT_UP
1
1
0
0
0
0
MSRKEY
x
x
0
1
0
1
MSXKEY
WAKE UP EVENT
1 Any button click or any movement
0 one click of left/right button
1 one click of left button
1 one click of right button
0 two times click of left button
0 two times click of right button
Bit6 Chassis Status Clear
= 1 Clear CASEOPEN# (Pin76) event.
= 0 Disable Clear Function.
Bit 5 - 0 Reserved
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