TH58NVG1S3AFT Datasheet, PDF (26/32 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TH58NVG1S3AFT05
(7) Status Read during a Read operation
comma 00
00
[A]
30
70
CE
WE
RY/BY
RE
Address N
Figure 18.
Status Read
command input _{Status Read}
Status output
The device status can be read out by inputting the Status Read command “70H” in Read mode.
Once the device has been set to Status Read mode by a “70H” command, the device will not return to
Read mode.
Therefore, a Status Read during a Read operation is prohibited.
However, when the Read command “00H” is input during [A], Status mode is reset and the device returns
to Read mode. In this case, data output starts automatically from address N and address input is
unnecessary
(8) Auto programming failure
80
10
Address Data
M
input
80
10
M
Fail
70
I/O
80
10
Address Data
N
input
If the programming result for page address M is Fail, do not try to program the
page to address N in another block without the data input sequence.
Because the previous input data has been lost, the same input sequence of 80H
command, address and data is necessary.
N
Figure 19.
(9) RY / BY : termination for the Ready/Busy pin ( RY / BY )
A pull-up resistor needs to be used for termination because the RY / BY buffer consists of an open drain
circuit.
V_CC
V_CC
Device
R
RY / BY
C_L
Ready
3.0 V
V_CC
1.0 V
t_f
Busy
1.0 V
3.0 V
t_r
V_SS
1.5 Ps
t_r 1.0 Ps
This data may vary from device to device.
We recommend that you use this data as a
reference when selecting a resistor value.
0.5 Ps
0
Figure 20.
t_f
t_r
V_CC 3.3 V
Ta 25°C
15 ns
C_L 100 pF
10 ns t_f
5 ns
1 K:
2 K: 3 K:
R
4 K:
2003-05-19A 26/32