TH58NVG1S3AFT Datasheet, PDF (22/32 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TH58NVG1S3AFT05
Status Read
The device automatically implements the execution and verification of the Program and Erase operations.
The Status Read function is used to monitor the Ready/Busy status of the device, determine the result (pass
/fail) of a Program or Erase operation, and determine whether the device is in Protect mode. The device status
is output via the I/O port on the RE clock after a “70H" command input.
The resulting information is outlined in Table 5.
Table 5. Status output table
STATUS
I/O1
Chip Status 1
Pass: 0
I/O2
Chip Status 2
Pass: 0
I/O3
Not Used
0
I/O4
Not Used
0
I/O5
Not Used
0
I/O6
Ready/Busy
Ready: 1
I/O7
Data Cache Busy Ready: 1
I/O8
Write Protect
Protect: 0
OUTPUT
Fail: 1
Fail: 1
Busy: 0
Busy: 0
Not Protected: 1
The Pass/Fail status on I/O1 and I/O2 is
only valid when the device is in the Ready
state.
An application example with multiple devices is shown in Figure 6.
CE1
CLE
ALE
Device
WE
1
RE
CE2
Device
2
CE3
Device
3
I/O1
to I/O8
RY / BY
CEN
Device
N
RY / BY
Busy
CLE
ALE
WE
CE1
CEN
RE
I/O
70H
70H
Status on Device 1
Status on Device N
Figure 6. Status Read timing application example
CEN  1
Device
N 1
System Design Note: If the RY / BY pin signals from multiple devices are wired together as shown in the
diagram, the Status Read function can be used to determine the status of each individual device.
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