TH58NVG1S3AFT Datasheet, PDF (23/32 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TH58NVG1S3AFT05
Reset
The Reset mode stops all operations. For example, in the case of a Program or Erase operation the internally
generated voltage is discharged to 0 volts and the device enters Wait state.
The response to an "FFH" Reset command input during the various device operations is as follows:
When a Reset (FFH) command is input during programming
80
10
FF
00
Internal V_PP
RY / BY
Figure 8.
t_RST (max 10 Ps)
When a Reset (FFH) command is input during erasing
D0
FF
00
Internal erase
voltage
RY / BY
Figure 9.
t_RST (max 500 Ps)
When a Reset (FFH) command is input during Read operation
00
FF
00
30
RY / BY
Figure 10. _{tRST (max 6 Ps)}
When a Status Read command (70H) is input after a Reset
FF
70
RY / BY
I/O status : Pass/Fail o Pass
: Ready/Busy o Ready
When two or more Reset commands are input in succession
(1)
(2)
(3)
10
FF
FF
FF
RY / BY
The second FF command is invalid, but the third FF command is valid.
Figure 12.
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