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| TH58NVG1S3AFT Datasheet, PDF (13/32 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS | |||
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Auto Block Erase Timing Diagram
TH58NVG1S3AFT05
CLE
CE
tCLS
tCS
tCLH
tCLS
WE
tALS
ALE
tALH
tWB
tBERASE
RE
tDS tDH
I/O
60H
PA0 to PA8 to
7
15
PA16
D0H
RY / BY
Auto Block
Erase Setup
command
: VIH or VIL
Erase Start
command
Busy
: Do not input data while data is being output.
70H
Status
output
Status Read
command
2003-05-19A 13/32
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