TH58NVG1S3AFT Datasheet, PDF (17/32 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TH58NVG1S3AFT05
Table 3. Command table (HEX)
Serial Data Input
Auto Program
Read Address Input
Column Address Change in Serial Data Output
Read Start
Read Column Change
Auto Block Erase
ID Read
Status Read
Reset
First Cycle
80
10
00
05
30
E0
60
90
70
FF
HEX data bit assignment
(Example)
Serial Data Input : 80H
Second Cycle




Acceptable while Busy

D


˓

˓
10000000
I/O8 7 6 5 4 3 2 I/O1
Table 4 shows the operation states for Read mode.
Table 4. Read mode operation states
CLE
ALE
CE
WE
RE
I/O1 to I/O8
Power
Output select
L
L
L
H
L
Data output
Active
Output Deselect
L
L
L
H
H
High impedance
Active
Standby
L
L
H
H
*
High impedance
Standby
Read Busy
*
*
*
*
*
High Impedance
Active
H: V_IH, L: V_IL, *: V_IH or V_IL
2003-05-19A 17/32