LM3S2B93 Datasheet, PDF (985/1194 Pages) Texas Instruments – Stellaris® LM3S2B93 Microcontroller

Stellaris^® LM3S2B93 Microcontroller
Register 12: PWM0 Control (PWM0CTL), offset 0x040
Register 13: PWM1 Control (PWM1CTL), offset 0x080
Register 14: PWM2 Control (PWM2CTL), offset 0x0C0
Register 15: PWM3 Control (PWM3CTL), offset 0x100
These registers configure the PWM signal generation blocks (PWM0CTL controls the PWM generator
0 block, and so on). The Register Update mode, Debug mode, Counting mode, and Block Enable
mode are all controlled via these registers. The blocks produce the PWM signals, which can be
either two independent PWM signals (from the same counter), or a paired set of PWM signals with
dead-band delays added.
The PWM0 block produces the PWM0 and PWM1 outputs, the PWM1 block produces the PWM2 and
PWM3 outputs, the PWM2 block produces the PWM4 and PWM5 outputs, and the PWM3 block produces
the PWM6 and PWM7 outputs.
PWM0 Control (PWM0CTL)
PWM0 base: 0x4002.8000
Offset 0x040
Type R/W, reset 0x0000.0000
31
30
29
28
Type
Reset
Type
Reset
RO
RO
0
0
15
14
DBFALLUPD
R/W
R/W
0
0
RO
RO
0
0
13
12
DBRISEUPD
R/W
R/W
0
0
27
26
25
24
reserved
RO
RO
RO
RO
0
0
0
0
11
10
DBCTLUPD
R/W
R/W
0
0
9
8
GENBUPD
R/W
R/W
0
0
23
22
21
20
19
18
17
16
LATCH MINFLTPER FLTSRC
RO
RO
RO
RO
RO
R/W
R/W
R/W
0
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
GENAUPD CMPBUPD CMPAUPD LOADUPD DEBUG MODE ENABLE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bit/Field
31:19
18
Name
reserved
LATCH
Type
RO
R/W
Reset
0x000
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Latch Fault Input
Value Description
0 Fault Condition Not Latched
A fault condition is in effect for as long as the generating source
is asserting.
1 Fault Condition Latched
A fault condition is set as the result of the assertion of the
faulting source and is held (latched) while the PWMISC
INTFAULTn bit is set. Clearing the INTFAULTn bit clears the
fault condition.
January 20, 2012
985
Texas Instruments-Production Data