LM3S2B93 Datasheet, PDF (310/1194 Pages) Texas Instruments – Stellaris® LM3S2B93 Microcontroller

Hibernation Module
Register 5: Hibernation Control (HIBCTL), offset 0x010
This register is the control register for the Hibernation module. This register must be written last
before a hibernate event is issued. Writes to other registers after the HIBREQ bit is set are not
guaranteed to complete before hibernation is entered.
Hibernation Control (HIBCTL)
Base 0x400F.C000
Offset 0x010
Type R/W, reset 0x8000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
WRC
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
VDD3ON VABORT CLK32EN LOWBATEN PINWEN RTCWEN CLKSEL HIBREQ RTCEN
Type RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31
30:9
8
Name
WRC
reserved
VDD3ON
Type
RO
RO
R/W
Reset
1
0x000
0
Description
Write Complete/Capable
Value Description
0 The interface is processing a prior write and is busy. Any write
operation that is attempted while WRC is 0 results in
undetermined behavior.
1 The interface is ready to accept a write.
Software must poll this bit between write requests and defer writes until
WRC=1 to ensure proper operation.
The bit name WRC means "Write Complete," which is the normal use of
the bit (between write accesses). However, because the bit is set
out-of-reset, the name can also mean "Write Capable" which simply
indicates that the interface may be written to by software. This difference
may be exploited by software at reset time to detect which method of
programming is appropriate: 0 = software delay loops required; 1 = WRC
paced available.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
VDD Powered
Value Description
1 The internal switches control the power to the on-chip modules
(VDD3ON mode).
0 The internal switches are not used. The HIB signal should be
used to control an external switch or regulator.
Note that regardless of the status of the VDD3ON bit, the HIB signal is
asserted during Hibernate mode. Thus, when VDD3ON is set, the HIB
signal should not be connected to the 3.3V regulator, and the 3.3V power
source should remain connected.
310
January 20, 2012
Texas Instruments-Production Data