LM3S2B93 Datasheet, PDF (526/1194 Pages) Texas Instruments – Stellaris® LM3S2B93 Microcontroller

External Peripheral Interface (EPI)
Register 9: EPI General-Purpose Configuration 2 (EPIGPCFG2), offset 0x014
Important: The MODE field in the EPICFG register determines which configuration register is
accessed for offsets 0x010 and 0x014.
To access EPIGPCFG2, the MODE field must be 0x0.
This register is used to configure operation while in General-Purpose mode. Note that this register
is reset when the MODE field in the EPICFG register is changed. If another mode is selected and
the General-Purpose mode is selected again, the values must be reinitialized.
EPI General-Purpose Configuration 2 (EPIGPCFG2)
Base 0x400D.0000
Offset 0x014
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
WORD
reserved
Type R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31
Name
WORD
Type
R/W
Reset
0
Description
Word Access Mode
By default, the EPI controller uses data bits [7:0] when the DSIZE field
in the EPIGPCFG register is 0x0; data bits [15:0] when the DSIZE field
is 0x1; data bits [23:0] when the DSIZE field is 0x2; and data bits [31:0]
when the DSIZE field is 0x3.
When using Word Access mode, the EPI controller can automatically
route bytes of data onto the correct byte lanes such that data can be
stored in bits [31:8] for DSIZE=0x0 and bits [31:16] for DSIZE=0x1. For
DSIZE=0x2 or 0x3, this bit must be clear.
Value Description
0 Word Access mode is disabled.
1 Word Access mode is enabled.
30:0
reserved
RO 0x000.0000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
526
January 20, 2012
Texas Instruments-Production Data