LM3S2B93 Datasheet, PDF (15/1194 Pages) Texas Instruments – Stellaris® LM3S2B93 Microcontroller

Stellaris^® LM3S2B93 Microcontroller
List of Tables
Table 1.
Table 2.
Table 2-1.
Table 2-2.
Table 2-3.
Table 2-4.
Table 2-5.
Table 2-6.
Table 2-7.
Table 2-8.
Table 2-9.
Table 2-10.
Table 2-11.
Table 2-12.
Table 2-13.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
Table 4-1.
Table 4-2.
Table 4-3.
Table 4-4.
Table 5-1.
Table 5-2.
Table 5-3.
Table 5-4.
Table 5-5.
Table 5-6.
Table 5-7.
Table 5-8.
Table 5-9.
Table 6-1.
Table 6-2.
Table 6-3.
Table 6-4.
Table 7-1.
Table 7-2.
Table 7-3.
Table 8-1.
Table 8-2.
Revision History .................................................................................................. 32
Documentation Conventions ................................................................................ 44
Summary of Processor Mode, Privilege Level, and Stack Use ................................ 73
Processor Register Map ....................................................................................... 74
PSR Register Combinations ................................................................................. 79
Memory Map ....................................................................................................... 87
Memory Access Behavior ..................................................................................... 90
SRAM Memory Bit-Banding Regions .................................................................... 92
Peripheral Memory Bit-Banding Regions ............................................................... 92
Exception Types .................................................................................................. 98
Interrupts ............................................................................................................ 99
Exception Return Behavior ................................................................................. 104
Faults ............................................................................................................... 104
Fault Status and Fault Address Registers ............................................................ 106
Cortex-M3 Instruction Summary ......................................................................... 108
Core Peripheral Register Regions ....................................................................... 111
Memory Attributes Summary .............................................................................. 114
TEX, S, C, and B Bit Field Encoding ................................................................... 117
Cache Policy for Memory Attribute Encoding ....................................................... 118
AP Bit Field Encoding ........................................................................................ 118
Memory Region Attributes for Stellaris Microcontrollers ........................................ 118
Peripherals Register Map ................................................................................... 119
Interrupt Priority Levels ...................................................................................... 146
Example SIZE Field Values ................................................................................ 174
JTAG_SWD_SWO Signals (100LQFP) ................................................................ 178
JTAG_SWD_SWO Signals (108BGA) ................................................................. 179
JTAG Port Pins State after Power-On Reset or RST assertion .............................. 180
JTAG Instruction Register Commands ................................................................. 185
System Control & Clocks Signals (100LQFP) ...................................................... 189
System Control & Clocks Signals (108BGA) ........................................................ 189
Reset Sources ................................................................................................... 190
Clock Source Options ........................................................................................ 197
Possible System Clock Frequencies Using the SYSDIV Field ............................... 200
Examples of Possible System Clock Frequencies Using the SYSDIV2 Field .......... 200
Examples of Possible System Clock Frequencies with DIV400=1 ......................... 201
System Control Register Map ............................................................................. 205
RCC2 Fields that Override RCC Fields ............................................................... 226
Hibernate Signals (100LQFP) ............................................................................. 296
Hibernate Signals (108BGA) .............................................................................. 297
Hibernation Module Clock Operation ................................................................... 303
Hibernation Module Register Map ....................................................................... 305
Flash Memory Protection Policy Combinations .................................................... 326
User-Programmable Flash Memory Resident Registers ....................................... 330
Flash Register Map ............................................................................................ 330
μDMA Channel Assignments .............................................................................. 361
Request Type Support ....................................................................................... 363
January 20, 2012
15
Texas Instruments-Production Data