LM3S2B93 Datasheet, PDF (3/1194 Pages) Texas Instruments – Stellaris® LM3S2B93 Microcontroller

Stellaris^® LM3S2B93 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 32
About This Document .................................................................................................................... 43
Audience .............................................................................................................................................. 43
About This Manual ................................................................................................................................ 43
Related Documents ............................................................................................................................... 43
Documentation Conventions .................................................................................................................. 44
1
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.3.8
1.3.9
1.4
Architectural Overview .......................................................................................... 46
Overview ...................................................................................................................... 46
Target Applications ........................................................................................................ 48
Features ....................................................................................................................... 48
ARM Cortex-M3 Processor Core .................................................................................... 48
On-Chip Memory ........................................................................................................... 50
External Peripheral Interface ......................................................................................... 51
Serial Communications Peripherals ................................................................................ 53
System Integration ........................................................................................................ 57
Advanced Motion Control ............................................................................................... 63
Analog .......................................................................................................................... 65
JTAG and ARM Serial Wire Debug ................................................................................ 66
Packaging and Temperature .......................................................................................... 67
Hardware Details .......................................................................................................... 67
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
The Cortex-M3 Processor ...................................................................................... 68
Block Diagram .............................................................................................................. 69
Overview ...................................................................................................................... 70
System-Level Interface .................................................................................................. 70
Integrated Configurable Debug ...................................................................................... 70
Trace Port Interface Unit (TPIU) ..................................................................................... 71
Cortex-M3 System Component Details ........................................................................... 71
Programming Model ...................................................................................................... 72
Processor Mode and Privilege Levels for Software Execution ........................................... 72
Stacks .......................................................................................................................... 72
Register Map ................................................................................................................ 73
Register Descriptions .................................................................................................... 74
Exceptions and Interrupts .............................................................................................. 87
Data Types ................................................................................................................... 87
Memory Model .............................................................................................................. 87
Memory Regions, Types and Attributes ........................................................................... 89
Memory System Ordering of Memory Accesses .............................................................. 90
Behavior of Memory Accesses ....................................................................................... 90
Software Ordering of Memory Accesses ......................................................................... 91
Bit-Banding ................................................................................................................... 92
Data Storage ................................................................................................................ 94
Synchronization Primitives ............................................................................................. 95
Exception Model ........................................................................................................... 96
Exception States ........................................................................................................... 97
Exception Types ............................................................................................................ 97
January 20, 2012
3
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