LM3S2B93 Datasheet, PDF (1063/1194 Pages) Texas Instruments – Stellaris® LM3S2B93 Microcontroller

Stellaris^® LM3S2B93 Microcontroller
Table 23-3. Signals by Signal Name (continued)
Pin Name
Fault2
Fault3
GND
GNDA
Pin Number Pin Mux / Pin
Assignment
16
PG3 (4)
24
PC5 (4)
63
PH5 (10)
65
PB3 (4)
84
PH2 (4)
9
fixed
21
33
45
54
57
69
82
94
4
fixed
Pin Type
I
I
-
-
HIB
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
I2S0RXMCLK
I2S0RXSCK
I2S0RXSD
I2S0RXWS
I2S0TXMCLK
I2S0TXSCK
I2S0TXSD
I2S0TXWS
51
fixed
O
72
PB2 (1)
I/O
65
PB3 (1)
I/O
14
PJ0 (11)
I/O
19
PG0 (3)
26
PA0 (8)
34
PA6 (1)
18
PG1 (3)
I/O
27
PA1 (8)
35
PA7 (1)
87
PJ1 (11)
16
PG3 (9)
I/O
29
PA3 (9)
98
PD5 (8)
10
PD0 (8)
I/O
40
PG5 (9)
17
PG2 (9)
I/O
28
PA2 (9)
97
PD4 (8)
11
PD1 (8)
I/O
37
PG6 (9)
43
PF6 (9)
I/O
61
PF1 (8)
30
PA4 (9)
I/O
90
PB6 (9)
99
PD6 (8)
5
PE5 (9)
I/O
47
PF0 (8)
6
PE4 (9)
I/O
31
PA5 (9)
100
PD7 (8)
Buffer Type^a Description
TTL
PWM Fault 2.
TTL
PWM Fault 3.
Power Ground reference for logic and I/O pins.
Power
OD
OD
OD
OD
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
An output that indicates the processor is in
Hibernate mode.
I²C module 0 clock.
I²C module 0 data.
I²C module 1 clock.
OD
I²C module 1 data.
TTL
I²S module 0 receive master clock.
TTL
I²S module 0 receive clock.
TTL
I²S module 0 receive data.
TTL
I²S module 0 receive word select.
TTL
I²S module 0 transmit master clock.
TTL
I²S module 0 transmit clock.
TTL
I²S module 0 transmit data.
TTL
I²S module 0 transmit word select.
January 20, 2012
Texas Instruments-Production Data
1063