DRV8320 Datasheet, PDF (61/80 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

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DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3 – FEBRUARY 2017
Table 21. DRV832xR Buck Regulator External Components
COMPONENT
C_VIN
C_BOOT
D_SW
L_SW
C_OUT
R_FB1
R_FB2
PIN 1
VIN
SW
SW
SW
OUT ⁽¹⁾
OUT ⁽¹⁾
FB
PIN 2
BGND
CB
BGND
OUT ⁽¹⁾
BGND
FB
BGND
RECOMMENDED
X5R or X7R, 1 to 10 µF, VM-rated capacitor
X5R or X7R, 0.1-µF, 16-V capacitor
Schottky diode
Output inductor
X5R or X7R, OUT rated capacitor
Resistor divider to set buck output voltage
(1) The OUT pin is not a pin on the DRV8320R and DRV8323R devices, but is the regulated output voltage of the buck regulator after the
output inductor.
9.2.1.2.1 External MOSFET Support
The DRV832x family of devices MOSFET support is based on the charge-pump capacity and output PWM
switching frequency. For a quick calculation of MOSFET driving capacity, use Equation 9 and Equation 10 for
three phase BLDC motor applications.
Trapezoidal 120° Commutation: I_VCP > Q_g ׃_PWM
(9)
Sinusoidal 180° Commutation: I_VCP > 3 × Q_g ׃_PWM
where
• ƒ_PWM is the maximum desired PWM switching frequency.
• I_VCP is the charge pump capacity, which depends on the VM pin voltage.
• The multiplier based on the commutation control method, may vary based on implementation.
(10)
9.2.1.2.1.1 Example
If a system at V_VM = 8 V (I_VCP = 15 mA) uses a maximum PWM switching frequency of 45 kHz, then the charge-
pump can support MOSFETs using trapezoidal commutation with a Q_g < 167 nC, and MOSFETs with sinusoidal
commutation Q_g < 56 nC.
9.2.1.2.2 IDRIVE Configuration
The gate drive current strength, I_DRIVE, is selected based on the gate-to-drain charge of the external MOSFETs
and the target rise and fall times at the outputs. If I_DRIVE is selected to be too low for a given MOSFET, then the
MOSFET may not turn on completely within the t_DRIVE time and a gate drive fault may be asserted. Additionally,
slow rise and fall times will lead to higher switching power losses. TI recommends adjusting these values in
system with the required external MOSFETs and motor to determine the best possible setting for any application.
The I_DRIVEP and I_DRIVEN current for both the low-side and high-side MOSFETs are independently adjustable on
SPI devices through the SPI registers. On hardware interface devices, both source and sink settings are selected
simultaneously on the IDRIVE pin.
For MOSFETs with a known gate-to-drain charge Q_gd, desired rise time (t_r), and a desired fall time (t_f), use
Equation 11 and Equation 12 to calculate the value of I_DRIVEP and I_DRIVEN (respectively).
I_DRIVEP ! Q_gd u t_r
(11)
I_DRIVEN ! Q_gd u t_f
(12)
9.2.1.2.2.1 Example
Use Equation 13 and Equation 14 to calculate the value of I_DRIVEP1 and I_DRIVEP2 (respectively) for a gate to drain
charge of 14 nC and a rise time from 100 to 300 ns.
I_DRIVEP1
14 nC
100 ns
140 mA
(13)
I_DRIVEP2
14 nC
300 ns
47 mA
(14)
Copyright © 2017, Texas Instruments Incorporated
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