DRV8320 Datasheet, PDF (55/80 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

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DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3 – FEBRUARY 2017
8.6.2.3 Gate Drive LS Register (address = 0x03h)
The gate drive LS register is shown in Figure 48 and described in Table 16.
Register access type: Read/Write
Figure 48. Gate Drive LS Register
10
CBC
R/W-1b
Bit
10
9-8
7-4
3-0
9
8
TDRIVE
R/W-11b
Field
CBC
TDRIVE
IDRIVEP_LS
IDRIVEN_LS
7
6
5
4
3
2
1
0
IDRIVEP_LS
IDRIVEN_LS
R/W-1111b
R/W-1111b
Table 16. Gate Drive LS Register Field Descriptions
Type
R/W
R/W
R/W
R/W
Default
1b
11b
1111b
1111b
Description
In retry OCP_MODE, for both VDS_OCP and SEN_OCP, the
fault is automatically cleared when a PWM input is given
00b = 500-ns peak gate-current drive time
01b = 1000-ns peak gate-current drive time
10b = 2000-ns peak gate-current drive time
11b = 4000-ns peak gate-current drive time
0000b = 10 mA
0001b = 30 mA
0010b = 60 mA
0011b = 80 mA
0100b = 120 mA
0101b = 140 mA
0110b = 170 mA
0111b = 190 mA
1000b = 260 mA
1001b = 330 mA
1010b = 370 mA
1011b = 440 mA
1100b = 570 mA
1101b = 680 mA
1110b = 820 mA
1111b = 1000 mA
0000b = 20 mA
0001b = 60 mA
0010b = 120 mA
0011b = 160 mA
0100b = 240 mA
0101b = 280 mA
0110b = 340 mA
0111b = 380 mA
1000b = 520 mA
1001b = 660 mA
1010b = 740 mA
1011b = 880 mA
1100b = 1140 mA
1101b = 1360 mA
1110b = 1640 mA
1111b = 2000 mA
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