DRV8320 Datasheet, PDF (54/80 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3 – FEBRUARY 2017
www.ti.com
8.6.2.2 Gate Drive HS Register (address = 0x03h)
The gate drive HS register is shown in Figure 47 and described in Table 15.
Register access type: Read/Write
Figure 47. Gate Drive HS Register
10
9
8
LOCK
R/W-011b
Bit
10-8
Field
LOCK
7-4 IDRIVEP_HS
3-0 IDRIVEN_HS
7
6
5
4
3
2
1
0
IDRIVEP_HS
IDRIVEn_HS
R/W-1111b
R/W-1111b
Table 15. Gate Drive HS Field Descriptions
Type
R/W
R/W
R/W
Default
011b
1111b
1111b
Description
Write 110b to lock the settings by ignoring further register writes
except to these bits and address 0x02h bits 0-2.
Writing any sequence other than 110b has no effect when
unlocked.
Write 011b to this register to unlock all registers.
Writing any sequence other than 011b has no effect when
locked.
0000b = 10 mA
0001b = 30 mA
0010b = 60 mA
0011b = 80 mA
0100b = 120 mA
0101b = 140 mA
0110b = 170 mA
0111b = 190 mA
1000b = 260 mA
1001b = 330 mA
1010b = 370 mA
1011b = 440 mA
1100b = 570 mA
1101b = 680 mA
1110b = 820 mA
1111b = 1000 mA
0000b = 20 mA
0001b = 60 mA
0010b = 120 mA
0011b = 160 mA
0100b = 240 mA
0101b = 280 mA
0110b = 340 mA
0111b = 380 mA
1000b = 520 mA
1001b = 660 mA
1010b = 740 mA
1011b = 880 mA
1100b = 1140 mA
1101b = 1360 mA
1110b = 1640 mA
1111b = 2000 mA
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