DRV8320 Datasheet, PDF (27/80 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

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Functional Block Diagram (continued)
DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3 – FEBRUARY 2017
VM
VM
1 …F
>10 …F 0.1 …F
VCP
CPH
47 nF
CPL
VGLS
DGND
30 mA
1 …F
DVDD
AGND
PGND
VCP
Charge
Pump
VGLS
Linear
Regulator
DVDD
Linear
Regulator
Power
ENABLE
INHA
INLA
INHB
INLB
Control
Inputs
INHC
INLC
VCC
SDI
R_PU
SPI
SDO
SCLK
Digital
Core
Smart Gate
Drive
Protection
VCP
HS
VGLS
LS
Gate Driver
VCP
HS
VGLS
LS
Gate Driver
VCP
HS
VGLS
LS
Gate Driver
Fault Output
VDRAIN
VM
GHA
SHA
GLA
VM
GHB
SHB
GLB
VM
GHC
SHC
GLC
VCC
R_PU
nFAULT
VCC
nSCS
0.1 …F
VREF
SOC
SOB
SOA
CAL
VIN
VIN
nSHDN
C_IN
BGND
Output
Offset
Bias
Buck Regulator
(LMR16006X)
SPC
AV
SNC
R_SEN
SPB
AV
SNB
R_SEN
SPA
AV
SNA
R_SEN
CB
0.1 µF
SW
D_OUT
FB
L_{OUT 600 mA}
R_FB1
C_OUT
R_FB2
Copyright © 2017, Texas Instruments Incorporated
Figure 17. Block Diagram for DRV8323RS
Copyright © 2017, Texas Instruments Incorporated
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