DRV8320 Datasheet, PDF (43/80 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

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DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3 – FEBRUARY 2017
The LMR16006 device can operate at high duty cycles because of the boot UVLO and then refreshs the wimp
MOSFET. The output voltage can be stepped down to as low as the 0.8-V reference. The internal soft-start
feature minimizes inrush currents.
For additional details and design information refer to LMR16006 SIMPLE SWITCHER® 60 V 0.6 A Buck
Regulators With High Efficiency Eco-mode.
8.3.5.1 Fixed Frequency PWM Control
The LMR16006 device has a fixed switching frequency and implements peak current-mode control. The output
voltage is compared through external resistors on the FB pin to an internal voltage reference by an error amplifier
which drives the internal COMP node. An internal oscillator initiates the turnon of the high-side power switch. The
error amplifier output is compared to the high-side power switch current. When the power switch current reaches
the level set by the internal COMP voltage, the power switch turns off. The internal COMP node voltage
increases and decreases as the output current increases and decreases. The device implements a current limit
by clamping the COMP node voltage to a maximum level.
8.3.5.2 Bootstrap Voltage (CB)
The LMR16006 device has an integrated bootstrap regulator, and requires a small ceramic capacitor between
the CB and SW pins to provide the gate drive voltage for the high-side MOSFET. The CB capacitor is refreshed
when the high-side MOSFET is off and the low-side diode conducts. To improve dropout, the LMR16006 device
is designed to operate at 100% duty cycle as long as the CB to SW pin voltage is greater than 3 V. When the
voltage from the CB to SW pin drops below 3 V, the high-side MOSFET turns off using a UVLO circuit which
allows the low-side diode to conduct and refresh the charge on the CB capacitor. Because the supply current
sourced from the CB capacitor is low, the high-side MOSFET can remain on for more switching cycles than are
required to refresh the capacitor. Therefore, the effective duty cycle of the switching regulator is high. Attention
must be taken in maximum duty-cycle applications with a light load. To ensure the SW pin can be pulled to
ground to refresh the CB capacitor, an internal circuit charges the CB capacitor when the load is light or the
device is working in dropout condition.
8.3.5.3 Output Voltage Setting
The output voltage is set using the feedback pin (FB) and a resistor divider connected to the output as shown in
the Figure 51 section. The voltage of the feedback pin is 0.765 V, so the ratio of the feedback resistors sets the
output voltage according to Equation 5.
V_O
0.765
V
u
§
¨¹
©
ª R1º ·
«¬_R2
»¼
¸
¹
(5)
Typically the starting value of R2 is from 1 kΩ to 100 kΩ. Use Equation 6 to calculate the value of R1.
R1
R2 u
§
¨
©
ª
«
¬
V_O
0.765
V
º
»
¼
·
1_¸
¹
(6)
8.3.5.4 Enable nSHDN and VIN Undervoltage Lockout
The nSHDN pin of the LMR16006 device is a high-voltage tolerant input with an internal pullup circuit. The
device can be enabled even if the nSHDN pin is floating. The regulator can also be turned on using 1.23-V or
higher logic signals. If the use of a higher voltage is desired because of system or other constraints, a 100-kΩ or
larger value resistor is recommended between the applied voltage and the nSHDN pin to help protect the device.
When the nSHDN pin is pulled down to 0 V, the device turns off and enters the lowest shutdown current mode.
In shutdown mode the supply current decreases to approximately 1 µA. If the shutdown function is unused, the
nSHDN pin can be tied to the VIN pin with a 100-kΩ resistor. The maximum voltage to the nSHDN pin should not
exceed 60 V. The LMR16006 device has an internal UVLO circuit to shut down the output if the input voltage
falls below an internally-fixed UVLO-threshold level which ensures that the regulator is not latched into an
unknown state during low input voltage conditions. The regulator powers up when the input voltage exceeds the
voltage level. If the UVLO voltage must be higher, use the nSHDN pin to adjust the system UVLO by using
external resistors.
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