DRV8320 Datasheet, PDF (19/80 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

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8 Detailed Description
DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3 – FEBRUARY 2017
8.1 Overview
The DRV832x family of devices are integrated 6 to 60-V gate drivers for three-phase motor drive applications.
These devices reduce system component count, cost, and complexity by integrating three independent half-
bridge gate drivers, charge pump and linear regulator for the high-side and low-side gate driver supply voltages,
optional triple current shunt amplifiers, and an optional 600-mA buck regulator. A standard serial peripheral
interface (SPI) provides a simple method for configuring the various device settings and reading fault diagnostic
information through an external controller. Alternatively, a hardware interface (H/W) option allows for configuring
the most commonly used settings through fixed external resistors.
The gate drivers support external N-channel high-side and low-side power MOSFETs and can drive up to 1-A
source, 2-A sink peak currents with a 25-mA average output current. The high-side gate drive supply voltage is
generated using a doubler charge-pump architecture that regulates the VCP output to V_VM + 11-V. The low-side
gate drive supply voltage is generated using a linear regulator from the VM power supply that regulates to 11 V.
A smart gate-drive architecture provides the ability to dynamically adjust the output gate-drive current strength
allowing for the gate driver to control the power MOSFET V_DS switching speed. This allows for the removal of
external gate drive resistors and diodes reducing BOM component count, cost, and PCB area. The architecture
also uses an internal state machine to protect against gate-drive short-circuit events, control the half-bridge dead
time, and protect against dV/dt parasitic turnon of the external power MOSFET.
The DRV8323 and DRV8323R devices integrate three, bidirectional current-shunt amplifiers for monitoring the
current level through each of the external half-bridges using a low-side shunt resistor. The gain setting of the
shunt amplifier can be adjusted through the SPI or hardware interface with the SPI providing additional flexibility
to adjust the output bias point.
The DRV8320R and DRV8323R devices integrate a 600-mA buck regulator that can be used to power an
external controller or other logic circuits. The buck regulator is implemented as a separate internal die that can
use either the same or a different power supply from the gate driver.
In addition to the high level of device integration, the DRV832x family of devices provides a wide range of
integrated protection features. These features include power-supply undervoltage lockout (UVLO), charge-pump
undervoltage lockout (CPUV), V_DS overcurrent monitoring (OCP), gate-driver short-circuit detection (GDF), and
overtemperature shutdown (OTW/OTSD). Fault events are indicated by the nFAULT pin with detailed information
available in the SPI registers on the SPI device version.
The DRV832x family of devices are available in 0.5-mm pin pitch, QFN surface-mount packages. The QFN sizes
are 5 × 5 mm for the 32-pin package, 6 × 6 mm for the 40-pin package, and 7 × 7 mm for the 48-pin package.
Copyright © 2017, Texas Instruments Incorporated
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Product Folder Links: DRV8320 DRV8320R DRV8323 DRV8323R