DRV8320 Datasheet, PDF (44/80 Pages) Texas Instruments – 6 to 60-V Three-Phase Smart Gate Driver

DRV8320, DRV8320R
DRV8323, DRV8323R
SLVSDJ3 – FEBRUARY 2017
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8.3.5.5 Current Limit
The LMR16006 device implements current mode control which uses the internal COMP voltage to turn off the
high-side MOSFET on a cycle-by-cycle basis. Each cycle, the switch current and internal COMP voltage are
compared. When the peak switch current intersects the COMP voltage, the high-side switch turns off. During
overcurrent conditions that pull the output voltage low, the error amplifier responds by driving the COMP node
high, increasing the switch current. The error amplifier output is clamped internally, which functions as a switch
current limit.
8.3.5.6 Overvoltage Transient Protection
The LMR16006 device incorporates an overvoltage transient protection (OVTP) circuit to minimize voltage
overshoot when recovering from output fault conditions or strong unload transients on power supply designs with
low-value output capacitance. For example, when the power supply output is overloaded, the error amplifier
compares the actual output voltage to the internal reference voltage. If the voltage of the FB pin is lower than the
internal reference voltage for a considerable time, the output of the error amplifier responds by clamping the error
amplifier output to a high voltage, therefore requesting the maximum output current. When the condition is
removed, the regulator output rises and the error amplifier output transitions to the steady-state duty cycle. In
some applications, the power-supply output voltage can respond faster than the error amplifier output can
respond which leads to the possibility of an output overshoot. The OVTP feature minimizes the output overshoot
when using a low-value output capacitor by implementing a circuit to compare the FB pin voltage to the OVTP
threshold which is 108% of the internal voltage reference. If the FB pin voltage is greater than the OVTP
threshold, the high-side MOSFET is disabled preventing current from flowing to the output and minimizing output
overshoot. When the FB voltage drops lower than the OVTP threshold, the high-side MOSFET is allowed to turn
on at the next clock cycle.
8.3.5.7 Thermal Shutdown
The device implements an internal thermal shutdown to help protect the device if the junction temperature
exceeds 170°C (typical). The thermal shutdown forces the device to stop switching when the junction
temperature exceeds the thermal trip threshold. When the junction temperature decreases below 160°C (typical),
the device reinitiates the power up sequence.
8.3.6 Gate Driver Protective Circuits
The DRV832x family of devices are fully protected against VM undervoltage, charge pump undervoltage,
MOSFET V_DS overcurrent, gate driver shorts, and overtemperature events.
8.3.6.1 VM Supply Undervoltage Lockout (UVLO)
If at any time the input supply voltage on the VM pin falls below the V_UVLO threshold, all of the external MOSFETs
are disabled, the charge pump is disabled, and the nFAULT pin is driven low. The FAULT and VM_UVLO bits
are also latched high in the registers on SPI devices. Normal operation resumes (gate driver operation and the
nFAULT pin is released) when the VM undervoltage condition is removed. The VM_UVLO bit remains set until
cleared through the CLR_FLT bit or an ENABLE pin reset pulse (t_RST).
8.3.6.2 VCP Charge-Pump Undervoltage Lockout (CPUV)
If at any time the voltage on the VCP pin (charge pump) falls below the V_CPUV threshold voltage of the charge
pump, all of the external MOSFETs are disabled and the nFAULT pin is driven low. The FAULT and CPUV bits
are also latched high in the registers on SPI devices. Normal operation resumes (gate-driver operation and the
nFAULT pin is released) when the VCP undervoltage condition is removed. The CPUV bit remains set until
cleared through the CLR_FLT bit or an ENABLE pin reset pulse (t_RST). Setting the DIS_CPUV bit high on the SPI
devices disables this protection feature. On hardware interface devices, the CPUV protection is always enabled.
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