LM3S6422 Datasheet, PDF (6/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Table of Contents
10.2 Signal Description ....................................................................................................... 358
10.3 Functional Description ................................................................................................. 359
10.3.1 Sample Sequencers .................................................................................................... 359
10.3.2 Module Control ............................................................................................................ 359
10.3.3 Hardware Sample Averaging Circuit ............................................................................. 360
10.3.4 Analog-to-Digital Converter .......................................................................................... 360
10.3.5 Differential Sampling ................................................................................................... 361
10.3.6 Test Modes ................................................................................................................. 363
10.3.7 Internal Temperature Sensor ........................................................................................ 363
10.4 Initialization and Configuration ..................................................................................... 364
10.4.1 Module Initialization ..................................................................................................... 364
10.4.2 Sample Sequencer Configuration ................................................................................. 364
10.5 Register Map .............................................................................................................. 365
10.6 Register Descriptions .................................................................................................. 366
11
11.1
11.2
11.3
11.3.1
11.3.2
11.3.3
11.3.4
11.3.5
11.3.6
11.3.7
11.3.8
11.4
11.5
11.6
Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 393
Block Diagram ............................................................................................................ 394
Signal Description ....................................................................................................... 394
Functional Description ................................................................................................. 395
Transmit/Receive Logic ............................................................................................... 395
Baud-Rate Generation ................................................................................................. 395
Data Transmission ...................................................................................................... 396
Serial IR (SIR) ............................................................................................................. 397
FIFO Operation ........................................................................................................... 398
Interrupts .................................................................................................................... 398
Loopback Operation .................................................................................................... 399
IrDA SIR block ............................................................................................................ 399
Initialization and Configuration ..................................................................................... 399
Register Map .............................................................................................................. 400
Register Descriptions .................................................................................................. 401
12 Synchronous Serial Interface (SSI) .................................................................... 435
12.1 Block Diagram ............................................................................................................ 435
12.2 Signal Description ....................................................................................................... 435
12.3 Functional Description ................................................................................................. 436
12.3.1 Bit Rate Generation ..................................................................................................... 436
12.3.2 FIFO Operation ........................................................................................................... 437
12.3.3 Interrupts .................................................................................................................... 437
12.3.4 Frame Formats ........................................................................................................... 437
12.4 Initialization and Configuration ..................................................................................... 445
12.5 Register Map .............................................................................................................. 446
12.6 Register Descriptions .................................................................................................. 447
13 Ethernet Controller .............................................................................................. 473
13.1 Block Diagram ............................................................................................................ 473
13.2 Signal Description ....................................................................................................... 474
13.3 Functional Description ................................................................................................. 476
13.3.1 MAC Operation ........................................................................................................... 476
13.3.2 Internal MII Operation .................................................................................................. 479
13.3.3 PHY Operation ............................................................................................................ 479
13.3.4 Interrupts .................................................................................................................... 480
6
June 18, 2012
Texas Instruments-Production Data