LM3S6422 Datasheet, PDF (524/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Analog Comparators
14.3.1
Internal Reference Programming
The structure of the internal reference is shown in Figure 14-3 on page 524. This is controlled by a
single configuration register (ACREFCTL). Table 14-3 on page 524 shows the programming options
to develop specific internal reference values, to compare an external voltage against a particular
voltage generated internally.
Figure 14-3. Comparator Internal Reference Structure
AVDD
8R
R
8R
R
R
•••
EN
VREF
RNG
15 14
•••
1
0
Decoder
internal
reference
Table 14-3. Internal Reference Voltage and ACREFCTL Field Values
ACREFCTL Register
EN Bit Value RNG Bit Value
EN=0
RNG=X
RNG=0
Output Reference Voltage Based on VREF Field Value
0 V (GND) for any value of VREF; however, it is recommended that RNG=1 and
VREF=0 for the least noisy ground reference.
Total resistance in ladder is 31 R.
EN=1
RNG=1
The range of internal reference in this mode is 0.85-2.448 V.
Total resistance in ladder is 23 R.
14.4
The range of internal reference for this mode is 0-2.152 V.
Initialization and Configuration
The following example shows how to configure an analog comparator to read back its output value
from an internal register.
1. Enable the analog comparator 0 clock by writing a value of 0x0010.0000 to the RCGC1 register
in the System Control module.
524
June 18, 2012
Texas Instruments-Production Data