LM3S6422 Datasheet, PDF (539/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Stellaris^® LM3S6422 Microcontroller
16.1.2 Signals by Signal Name
Table 16-2. Signals by Signal Name
Pin Name
ADC0
ADC1
C0+
C0-
C0o
C1+
C1-
C1o
CCP0
CCP1
CCP2
CCP3
CMOD0
Pin Number
1
2
90
92
100
24
91
24
66
34
67
23
65
Pin Type
I
I
I
I
O
I
I
O
I/O
I/O
I/O
I/O
I
CMOD1
76
I
ERBIAS
41
I
GND
GNDA
9
-
15
21
33
39
45
54
57
63
69
82
87
94
4
-
97
GNDPHY
LDO
42
-
85
86
7
-
LED0
LED1
MDIO
59
O
60
O
58
I/O
Buffer Type^a Description
Analog Analog-to-digital converter input 0.
Analog Analog-to-digital converter input 1.
Analog Analog comparator 0 positive input.
Analog Analog comparator 0 negative input.
TTL
Analog comparator 0 output.
Analog Analog comparator 1 positive input.
Analog Analog comparator 1 negative input.
TTL
Analog comparator 1 output.
TTL
Capture/Compare/PWM 0.
TTL
Capture/Compare/PWM 1.
TTL
Capture/Compare/PWM 2.
TTL
Capture/Compare/PWM 3.
TTL
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
Analog
12.4-kΩ resistor (1% precision) used internally for Ethernet
PHY.
Power Ground reference for logic and I/O pins.
Power
Power
The ground reference for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
GND of the Ethernet PHY.
Power
TTL
TTL
TTL
Low drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 µF or
greater. The LDO pin must also be connected to the VDD25
pins at the board level in addition to the decoupling
capacitor(s).
Ethernet LED 0.
Ethernet LED 1.
MDIO of the Ethernet PHY.
June 18, 2012
539
Texas Instruments-Production Data