LM3S6422 Datasheet, PDF (10/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Table of Contents
Figure 12-11. MICROWIRE Frame Format (Continuous Transfer) ............................................. 444
Figure 12-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ............ 445
Figure 13-1. Ethernet Controller ............................................................................................. 474
Figure 13-2. Ethernet Controller Block Diagram ...................................................................... 474
Figure 13-3. Ethernet Frame ................................................................................................. 476
Figure 13-4. Interface to an Ethernet Jack .............................................................................. 482
Figure 14-1. Analog Comparator Module Block Diagram ......................................................... 522
Figure 14-2. Structure of Comparator Unit .............................................................................. 523
Figure 14-3. Comparator Internal Reference Structure ............................................................ 524
Figure 15-1. 100-Pin LQFP Package Pin Diagram .................................................................. 533
Figure 15-2. 108-Ball BGA Package Pin Diagram (Top View) ................................................... 534
Figure 18-1. Load Conditions ................................................................................................ 563
Figure 18-2. JTAG Test Clock Input Timing ............................................................................. 566
Figure 18-3. JTAG Test Access Port (TAP) Timing .................................................................. 566
Figure 18-4. JTAG TRST Timing ............................................................................................ 566
Figure 18-5. External Reset Timing (RST) .............................................................................. 567
Figure 18-6. Power-On Reset Timing ..................................................................................... 567
Figure 18-7. Brown-Out Reset Timing .................................................................................... 567
Figure 18-8. Software Reset Timing ....................................................................................... 568
Figure 18-9. Watchdog Reset Timing ..................................................................................... 568
Figure 18-10. ADC Input Equivalency Diagram ......................................................................... 569
Figure 18-11. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................... 570
Figure 18-12. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ................. 571
Figure 18-13. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ..................................... 571
Figure 18-14. External XTLP Oscillator Characteristics ............................................................. 574
Figure D-1. Stellaris LM3S6422 100-Pin LQFP Package Dimensions ..................................... 601
Figure D-2. 100-Pin LQFP Tray Dimensions .......................................................................... 603
Figure D-3. 100-Pin LQFP Tape and Reel Dimensions ........................................................... 604
Figure D-4. Stellaris LM3S6422 108-Ball BGA Package Dimensions ...................................... 605
Figure D-5. 108-Ball BGA Tray Dimensions ........................................................................... 607
Figure D-6. 108-Ball BGA Tape and Reel Dimensions ............................................................ 608
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June 18, 2012
Texas Instruments-Production Data