LM3S6422 Datasheet, PDF (474/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Ethernet Controller
Figure 13-1. Ethernet Controller
ARM Cortex M3
EMtehdeiranet ConPtrhoyllseircal
Access Layer Entity
Controller
MAC
(Layer 2)
PHY
(Layer 1)
Magnetics
RJ45
Figure 13-2 on page 474 shows more detail of the internal structure of the Ethernet Controller and
how the register set relates to various functions.
Figure 13-2. Ethernet Controller Block Diagram
Interrupt
Interrupt
Control
MACRIS
MACIACK
MACIM
Individual
Address
MACIA0
MACIA1
Receive
Control
MACRCTL
MACNP
Data
Access
MACDDATA
Transmit
Control
MACTCTL
MACTHR
MACTR
MII
Control
MACMCTL
MACMDV
MACMTXD
MACMRXD
Transmit
FIFO
Receive
FIFO
Transmit
Encoding
Pulse
Shaping
Collision
Detect
Carrier
Sense
Receive
Decoding
Clock
Recovery
TXOP
TXON
MDIX
RXIP
RXIN
Media Independent Interface
Management Register Set
MR0
MR1
MR2
MR3
MR4
MR5
MR6
MR16
MR17
MR18
MR19
MR23
MR24
Auto
Negotiation
Clock
Reference
XTALPPHY
XTALNPHY
LED0
LED1
13.2
Signal Description
Table 13-1 on page 475 and Table 13-2 on page 475 list the external signals of the Ethernet Controller
and describe the function of each. The Ethernet LED signals are alternate functions for GPIO signals
and default to be GPIO signals at reset. The column in the table below titled "Pin Assignment" lists
the GPIO pin placement for the LED signals. The AFSEL bit in the GPIO Alternate Function Select
(GPIOAFSEL) register (page 272) should be set to choose the LED function. For more information
on configuring GPIOs, see “General-Purpose Input/Outputs (GPIOs)” on page 251. The remaining
signals (with the word "fixed" in the Pin Mux/Pin Assignment column) have a fixed pin assignment
and function.
474
June 18, 2012
Texas Instruments-Production Data