LM3S6422 Datasheet, PDF (484/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Ethernet Controller
Table 13-4. Ethernet Register Map (continued)
Offset Name
Type
Reset
0x024 MACMDV
0x02C MACMTXD
0x030 MACMRXD
0x034 MACNP
0x038 MACTR
MII Management
-
MR0
-
MR1
-
MR2
R/W
0x0000.0080
R/W
0x0000.0000
R/W
0x0000.0000
RO
0x0000.0000
R/W
0x0000.0000
R/W
0x3100
RO
0x7849
RO
0x000E
-
MR3
RO
0x7237
-
MR4
R/W
0x01E1
-
MR5
RO
0x0000
-
MR6
RO
0x0000
-
MR16
R/W
0x0140
-
MR17
-
MR18
-
MR19
R/W
0x0000
RO
0x0000
R/W
0x4000
-
MR23
R/W
0x0010
-
MR24
R/W
0x00C0
Description
Ethernet MAC Management Divider
Ethernet MAC Management Transmit Data
Ethernet MAC Management Receive Data
Ethernet MAC Number of Packets
Ethernet MAC Transmission Request
See
page
498
499
500
501
502
Ethernet PHY Management Register 0 – Control
503
Ethernet PHY Management Register 1 – Status
505
Ethernet PHY Management Register 2 – PHY Identifier
1
507
Ethernet PHY Management Register 3 – PHY Identifier
2
508
Ethernet PHY Management Register 4 – Auto-Negotiation
Advertisement
509
Ethernet PHY Management Register 5 – Auto-Negotiation
Link Partner Base Page Ability
511
Ethernet PHY Management Register 6 – Auto-Negotiation
Expansion
512
Ethernet PHY Management Register 16 –
Vendor-Specific
513
Ethernet PHY Management Register 17 – Interrupt
Control/Status
515
Ethernet PHY Management Register 18 – Diagnostic
517
Ethernet PHY Management Register 19 – Transceiver
Control
518
Ethernet PHY Management Register 23 – LED
Configuration
519
Ethernet PHY Management Register 24 –MDI/MDIX
Control
520
13.6
Ethernet MAC Register Descriptions
The remainder of this section lists and describes the Ethernet MAC registers, in numerical order by
address offset. Also see “MII Management Register Descriptions” on page 502.
484
June 18, 2012
Texas Instruments-Production Data